diff options
| author | Thomas Gleixner <tglx@linutronix.de> | 2007-10-14 22:57:45 +0200 |
|---|---|---|
| committer | Thomas Gleixner <tglx@inhelltoy.tec.linutronix.de> | 2007-10-14 22:57:45 +0200 |
| commit | 89039b37be7c34194db0e72f956a5f02cfa30941 (patch) | |
| tree | c3ac037a5be066b16d4c44efd432caee60b1540c /.mailmap | |
| parent | 3ac508be76bf4ef5861365d9f337f990d523be8f (diff) | |
x86: force timer broadcast on late AMD C1E detection
The 64bit SMP bootup is slightly different to the 32bit one. It enables
the boot CPU local APIC timer before all CPUs are brought up. Some AMD C1E
systems have the C1E feature flag only set in the secondary CPU. Due to
the early enable of the boot CPU local APIC timer the APIC timer is
registered as a fully functional device. When we detect the wreckage during
the bringup of the secondary CPU, we need to force the boot CPU into
broadcast mode.
Check the C1E caused APIC timer disable, when the secondary APIC timer is
initialized. If the boot CPU APIC timer was registered as a functional
clock event device, then fix this up and utilize the
CLOCK_EVT_NOTIFY_BROADCAST_FORCE mechanism to force the already
registered boot CPU APIC timer into broadcast mode.
Tested by force injecting the failure mode.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to '.mailmap')
0 files changed, 0 insertions, 0 deletions