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authorKyungmin Park <kyungmin.park@samsung.com>2008-11-25 17:05:22 +0900
committerBen Dooks <ben-linux@fluff.org>2008-12-16 10:19:13 +0000
commit11e3bd09231bbc0188e0b7a2f3da3920fc74af83 (patch)
tree6c5741001d5d993caeeaaa75e782448b960ad6b3
parente4ea803ab0fcf985c2a2d24bc905a3cf9138e251 (diff)
[ARM] S3C64XX: Mask the pll values correctly
Correct the PLL field masks to ensure the PLL functions return the right value. Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> [ben-linux@fluff.org: improve the description text] Signed-off-by: Ben Dooks <ben-linux@fluff.org>
-rw-r--r--arch/arm/plat-s3c64xx/include/plat/pll.h6
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/plat-s3c64xx/include/plat/pll.h b/arch/arm/plat-s3c64xx/include/plat/pll.h
index 1a8576422f1..90bbd72fdc4 100644
--- a/arch/arm/plat-s3c64xx/include/plat/pll.h
+++ b/arch/arm/plat-s3c64xx/include/plat/pll.h
@@ -12,9 +12,9 @@
* published by the Free Software Foundation.
*/
-#define S3C6400_PLL_MDIV_MASK ((1 << (25-16)) - 1)
-#define S3C6400_PLL_PDIV_MASK ((1 << (13-8)) - 1)
-#define S3C6400_PLL_SDIV_MASK ((1 << (2-0)) - 1)
+#define S3C6400_PLL_MDIV_MASK ((1 << (25-16+1)) - 1)
+#define S3C6400_PLL_PDIV_MASK ((1 << (13-8+1)) - 1)
+#define S3C6400_PLL_SDIV_MASK ((1 << (2-0+1)) - 1)
#define S3C6400_PLL_MDIV_SHIFT (16)
#define S3C6400_PLL_PDIV_SHIFT (8)
#define S3C6400_PLL_SDIV_SHIFT (0)