diff options
| author | Ben Dooks <ben-linux@fluff.org> | 2008-01-28 13:01:30 +0100 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2008-01-28 13:20:52 +0000 |
| commit | cca851d7b4d87f3a644d3381930dc737890bd9ac (patch) | |
| tree | 0db760e113bac0bd0b97940731e999a84f6323a1 | |
| parent | e95f52cd3b664eaa9c2b2b123f2a339ae0f1a92b (diff) | |
[ARM] 4790/1: S3C2412: Fix parent selection for msysclk.
The msysclk clock was checking for the wrong PLL for the
parent in s3c2412_setparent_msysclk(), trying the UPLL instead
of the MPLL output.
Also ensure the mpll and fclks are at the same rate at init time.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| -rw-r--r-- | arch/arm/mach-s3c2412/clock.c | 2 | ||||
| -rw-r--r-- | arch/arm/mach-s3c2412/s3c2412.c | 2 |
2 files changed, 3 insertions, 1 deletions
diff --git a/arch/arm/mach-s3c2412/clock.c b/arch/arm/mach-s3c2412/clock.c index 42ccb5eb604..0f752500cd5 100644 --- a/arch/arm/mach-s3c2412/clock.c +++ b/arch/arm/mach-s3c2412/clock.c @@ -217,7 +217,7 @@ static int s3c2412_setparent_msysclk(struct clk *clk, struct clk *parent) if (parent == &clk_mdivclk) clksrc &= ~S3C2412_CLKSRC_MSYSCLK_MPLL; - else if (parent == &clk_upll) + else if (parent == &clk_mpll) clksrc |= S3C2412_CLKSRC_MSYSCLK_MPLL; else return -EINVAL; diff --git a/arch/arm/mach-s3c2412/s3c2412.c b/arch/arm/mach-s3c2412/s3c2412.c index 265cd3f567a..abf1599c9f9 100644 --- a/arch/arm/mach-s3c2412/s3c2412.c +++ b/arch/arm/mach-s3c2412/s3c2412.c @@ -168,6 +168,8 @@ void __init s3c2412_init_clocks(int xtal) fclk = s3c2410_get_pll(__raw_readl(S3C2410_MPLLCON), xtal*2); + clk_mpll.rate = fclk; + tmp = __raw_readl(S3C2410_CLKDIVN); /* work out clock scalings */ |