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| author | ashish kalra <ashish.kalra@freescale.com> | 2007-10-31 19:28:02 +0800 |
|---|---|---|
| committer | Jeff Garzik <jeff@garzik.org> | 2007-11-03 08:46:28 -0400 |
| commit | e7eac96e8f0e57a6e9f94943557bc2b23be31471 (patch) | |
| tree | 924d6ddfcef9ad6f0ceab7d7c25dd7ae807e6bde | |
| parent | 520d3a1a8cb3eb8794e3dbb822dbc40c20f18e52 (diff) | |
ata/sata_fsl: Move MPC8315DS link speed limit workaround to specific ifdef
Signed-off-by: ashish kalra <ashish.kalra@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
| -rw-r--r-- | drivers/ata/sata_fsl.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/ata/sata_fsl.c b/drivers/ata/sata_fsl.c index 5892472a568..e076e1f2e4d 100644 --- a/drivers/ata/sata_fsl.c +++ b/drivers/ata/sata_fsl.c @@ -652,6 +652,7 @@ static int sata_fsl_port_start(struct ata_port *ap) VPRINTK("HControl = 0x%x\n", ioread32(hcr_base + HCONTROL)); VPRINTK("CHBA = 0x%x\n", ioread32(hcr_base + CHBA)); +#ifdef CONFIG_MPC8315_DS /* * Workaround for 8315DS board 3gbps link-up issue, * currently limit SATA port to GEN1 speed @@ -664,6 +665,7 @@ static int sata_fsl_port_start(struct ata_port *ap) sata_fsl_scr_read(ap, SCR_CONTROL, &temp); dev_printk(KERN_WARNING, dev, "scr_control, speed limited to %x\n", temp); +#endif return 0; } |