serial: sh-sci: Reorder the SCxTDR write after the TDxE clear.

Under qemu there is a race between the TDxE read-and-clear and the SCxTDR
write. While on hardware it can be gauranteed that the read-and-clear
will happen prior to the character being written out, no such assumption
can be made under emulation. As this path happens with IRQs off and the
hardware itself doesn't care about the ordering, move the SCxTDR write
until after the read-and-clear.

Signed-off-by: Vladimir Prus <vladimir@codesourcery.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>

2 files changed, 2 insertions, 2 deletions

diff --git a/arch/sh/kernel/early_printk.c b/arch/sh/kernel/early_printk.c
index 98a29a78230..a952dcf9999 100644
--- a/arch/sh/kernel/early_printk.c
+++ b/arch/sh/kernel/early_printk.c
@@ -85,9 +85,9 @@ static void scif_sercon_putc(int c)
 	while (((sci_in(&scif_port, SCFDR) & EPK_FIFO_BITS) >= EPK_FIFO_SIZE))
 		;
 
-	sci_out(&scif_port, SCxTDR, c);
 	sci_in(&scif_port, SCxSR);
 	sci_out(&scif_port, SCxSR, 0xf3 & ~(0x20 | 0x40));
+	sci_out(&scif_port, SCxTDR, c);
 
 	while ((sci_in(&scif_port, SCxSR) & 0x40) == 0)
 		;
diff --git a/drivers/serial/sh-sci.c b/drivers/serial/sh-sci.c
index 518c0321e4d..165fc010978 100644
--- a/drivers/serial/sh-sci.c
+++ b/drivers/serial/sh-sci.c
@@ -144,9 +144,9 @@ static void put_char(struct uart_port *port, char c)
 		status = sci_in(port, SCxSR);
 	} while (!(status & SCxSR_TDxE(port)));
 
-	sci_out(port, SCxTDR, c);
 	sci_in(port, SCxSR);            /* Dummy read */
 	sci_out(port, SCxSR, SCxSR_TDxE_CLEAR(port));
+	sci_out(port, SCxTDR, c);
 
 	spin_unlock_irqrestore(&port->lock, flags);
 }