diff options
| author | Hartley Sweeten <hartleys@visionengravers.com> | 2008-09-05 17:14:35 +0100 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2008-09-07 17:39:35 +0100 |
| commit | f69162ae63a5fa045aff35b535906696ba85666f (patch) | |
| tree | 8e76bc2d0597a3e7f42d2a24ed930435aa73d70e | |
| parent | b8e6c91c74e9f0279b7c51048779b3d62da60b88 (diff) | |
[ARM] 5242/1: ep93xx: bugfix, GPIO port F enable register offset
The GPIO port F enable register offset points to the wrong register,
0x5c is the IntStsF register. The correct offset is 0x58. This patch
corrects it.
Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| -rw-r--r-- | arch/arm/mach-ep93xx/core.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c index f99f4366939..d6967dedce5 100644 --- a/arch/arm/mach-ep93xx/core.c +++ b/arch/arm/mach-ep93xx/core.c @@ -157,7 +157,7 @@ static unsigned char gpio_int_type2[3]; static const u8 int_type1_register_offset[3] = { 0x90, 0xac, 0x4c }; static const u8 int_type2_register_offset[3] = { 0x94, 0xb0, 0x50 }; static const u8 eoi_register_offset[3] = { 0x98, 0xb4, 0x54 }; -static const u8 int_en_register_offset[3] = { 0x9c, 0xb8, 0x5c }; +static const u8 int_en_register_offset[3] = { 0x9c, 0xb8, 0x58 }; void ep93xx_gpio_update_int_params(unsigned port) { |