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authorGlauber Costa <gcosta@redhat.com>2008-03-25 18:36:35 -0300
committerIngo Molnar <mingo@elte.hu>2008-04-19 19:19:56 +0200
commitb48ee7135230ac43b6820d59a784ac0bd51ae552 (patch)
treedfe39b19ba7b86b85df61eba1bfd8ed33eaf3eb8
parent802c1f6648aeb3eea670b4ef8b10014169b65699 (diff)
x86: align to clflush size
Do it instead of using the conservative approach we're currently doing. This is the way x86_64 does, and this patch makes this piece of code the same between them, ready to be integrated. Signed-off-by: Glauber Costa <gcosta@redhat.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
-rw-r--r--include/asm-x86/dma-mapping_32.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/include/asm-x86/dma-mapping_32.h b/include/asm-x86/dma-mapping_32.h
index fd7246dddad..d0512c9251b 100644
--- a/include/asm-x86/dma-mapping_32.h
+++ b/include/asm-x86/dma-mapping_32.h
@@ -21,7 +21,7 @@ dma_get_cache_alignment(void)
{
/* no easy way to get cache size on all x86, so return the
* maximum possible, to be safe */
- return (1 << INTERNODE_CACHE_SHIFT);
+ return boot_cpu_data.x86_clflush_size;
}
#define dma_is_consistent(d, h) (1)