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authorJacob Shin <jacob.w.shin@gmail.com>2006-06-26 13:58:47 +0200
committerLinus Torvalds <torvalds@g5.osdl.org>2006-06-26 10:48:20 -0700
commit17fc14ff1bdbc393e1cf4f6fd1e1e53d72ab9fe5 (patch)
tree9992a9079f4792f423f1e421d93814509b2c7d88
parentc38bfdc85aae0c6d1458269c0e063c2f4a116711 (diff)
[PATCH] x86_64: apic support for extended apic interrupt
Add support for extended APIC LVT found in future AMD processors. Signed-off-by: Jacob Shin <jacob.shin@amd.com> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
-rw-r--r--arch/x86_64/kernel/apic.c10
-rw-r--r--include/asm-x86_64/apic.h11
2 files changed, 14 insertions, 7 deletions
diff --git a/arch/x86_64/kernel/apic.c b/arch/x86_64/kernel/apic.c
index 53fc17d894e..396e125cb21 100644
--- a/arch/x86_64/kernel/apic.c
+++ b/arch/x86_64/kernel/apic.c
@@ -909,15 +909,13 @@ int setup_profiling_timer(unsigned int multiplier)
return -EINVAL;
}
-#ifdef CONFIG_X86_MCE_AMD
-void setup_threshold_lvt(unsigned long lvt_off)
+void setup_APIC_extened_lvt(unsigned char lvt_off, unsigned char vector,
+ unsigned char msg_type, unsigned char mask)
{
- unsigned int v = 0;
- unsigned long reg = (lvt_off << 4) + 0x500;
- v |= THRESHOLD_APIC_VECTOR;
+ unsigned long reg = (lvt_off << 4) + K8_APIC_EXT_LVT_BASE;
+ unsigned int v = (mask << 16) | (msg_type << 8) | vector;
apic_write(reg, v);
}
-#endif /* CONFIG_X86_MCE_AMD */
#undef APIC_DIVISOR
diff --git a/include/asm-x86_64/apic.h b/include/asm-x86_64/apic.h
index c9e6c2501a4..9d43ac8519b 100644
--- a/include/asm-x86_64/apic.h
+++ b/include/asm-x86_64/apic.h
@@ -84,9 +84,18 @@ extern void disable_APIC_timer(void);
extern void enable_APIC_timer(void);
extern void clustered_apic_check(void);
+extern void setup_APIC_extened_lvt(unsigned char lvt_off, unsigned char vector,
+ unsigned char msg_type, unsigned char mask);
+
+#define K8_APIC_EXT_LVT_BASE 0x500
+#define K8_APIC_EXT_INT_MSG_FIX 0x0
+#define K8_APIC_EXT_INT_MSG_SMI 0x2
+#define K8_APIC_EXT_INT_MSG_NMI 0x4
+#define K8_APIC_EXT_INT_MSG_EXT 0x7
+#define K8_APIC_EXT_LVT_ENTRY_THRESHOLD 0
+
extern int disable_timer_pin_1;
-extern void setup_threshold_lvt(unsigned long lvt_off);
void smp_send_timer_broadcast_ipi(void);
void switch_APIC_timer_to_ipi(void *cpumask);