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authorDavid S. Miller <davem@sunset.davemloft.net>2006-02-13 00:23:32 -0800
committerDavid S. Miller <davem@sunset.davemloft.net>2006-03-20 01:12:37 -0800
commit6c0f402f6cc62314ef83b975f3430350dcb6055f (patch)
tree394a2e981ee8fff3e6eda7aec2d20be8542ecae1
parent85dfa19ba92f88fa1c1482f655c7247119dfdcd5 (diff)
[SPARC64]: Implement rest of generic interrupt hypervisor calls.
Signed-off-by: David S. Miller <davem@davemloft.net>
-rw-r--r--arch/sparc64/kernel/entry.S66
-rw-r--r--include/asm-sparc64/hypervisor.h24
2 files changed, 89 insertions, 1 deletions
diff --git a/arch/sparc64/kernel/entry.S b/arch/sparc64/kernel/entry.S
index fa185f22705..a2842a72f8e 100644
--- a/arch/sparc64/kernel/entry.S
+++ b/arch/sparc64/kernel/entry.S
@@ -1701,9 +1701,73 @@ hard_smp_processor_id:
*
* returns %o0: sysino
*/
- .globl pci_sun4v_devino_to_sysino
+ .globl sun4v_devino_to_sysino
sun4v_devino_to_sysino:
mov HV_FAST_INTR_DEVINO2SYSINO, %o5
ta HV_FAST_TRAP
retl
mov %o1, %o0
+
+ /* %o0: sysino
+ *
+ * returns %o0: intr_enabled (HV_INTR_{DISABLED,ENABLED})
+ */
+ .globl sun4v_intr_getenabled
+sun4v_intr_getenabled:
+ mov HV_FAST_INTR_GETENABLED, %o5
+ ta HV_FAST_TRAP
+ retl
+ mov %o1, %o0
+
+ /* %o0: sysino
+ * %o1: intr_enabled (HV_INTR_{DISABLED,ENABLED})
+ */
+ .globl sun4v_intr_setenabled
+sun4v_intr_setenabled:
+ mov HV_FAST_INTR_SETENABLED, %o5
+ ta HV_FAST_TRAP
+ retl
+ nop
+
+ /* %o0: sysino
+ *
+ * returns %o0: intr_state (HV_INTR_STATE_*)
+ */
+ .globl sun4v_intr_getstate
+sun4v_intr_getstate:
+ mov HV_FAST_INTR_GETSTATE, %o5
+ ta HV_FAST_TRAP
+ retl
+ mov %o1, %o0
+
+ /* %o0: sysino
+ * %o1: intr_state (HV_INTR_STATE_*)
+ */
+ .globl sun4v_intr_setstate
+sun4v_intr_setstate:
+ mov HV_FAST_INTR_SETSTATE, %o5
+ ta HV_FAST_TRAP
+ retl
+ nop
+
+ /* %o0: sysino
+ *
+ * returns %o0: cpuid
+ */
+ .globl sun4v_intr_gettarget
+sun4v_intr_gettarget:
+ mov HV_FAST_INTR_GETTARGET, %o5
+ ta HV_FAST_TRAP
+ retl
+ mov %o1, %o0
+
+ /* %o0: sysino
+ * %o1: cpuid
+ */
+ .globl sun4v_intr_settarget
+sun4v_intr_settarget:
+ mov HV_FAST_INTR_SETTARGET, %o5
+ ta HV_FAST_TRAP
+ retl
+ nop
+
diff --git a/include/asm-sparc64/hypervisor.h b/include/asm-sparc64/hypervisor.h
index 16a40f48beb..587a0f6a0a7 100644
--- a/include/asm-sparc64/hypervisor.h
+++ b/include/asm-sparc64/hypervisor.h
@@ -1221,6 +1221,10 @@ extern unsigned long sun4v_devino_to_sysino(unsigned long devhandle,
*/
#define HV_FAST_INTR_GETENABLED 0xa1
+#ifndef __ASSEMBLY__
+extern unsigned long sun4v_intr_getenabled(unsigned long sysino);
+#endif
+
/* intr_setenabled()
* TRAP: HV_FAST_TRAP
* FUNCTION: HV_FAST_INTR_SETENABLED
@@ -1233,6 +1237,10 @@ extern unsigned long sun4v_devino_to_sysino(unsigned long devhandle,
*/
#define HV_FAST_INTR_SETENABLED 0xa2
+#ifndef __ASSEMBLY__
+extern void sun4v_intr_setenabled(unsigned long sysino, unsigned long intr_enabled);
+#endif
+
/* intr_getstate()
* TRAP: HV_FAST_TRAP
* FUNCTION: HV_FAST_INTR_GETSTATE
@@ -1245,6 +1253,10 @@ extern unsigned long sun4v_devino_to_sysino(unsigned long devhandle,
*/
#define HV_FAST_INTR_GETSTATE 0xa3
+#ifndef __ASSEMBLY__
+extern unsigned long sun4v_intr_getstate(unsigned long sysino);
+#endif
+
/* intr_setstate()
* TRAP: HV_FAST_TRAP
* FUNCTION: HV_FAST_INTR_SETSTATE
@@ -1261,6 +1273,10 @@ extern unsigned long sun4v_devino_to_sysino(unsigned long devhandle,
*/
#define HV_FAST_INTR_SETSTATE 0xa4
+#ifndef __ASSEMBLY__
+extern void sun4v_intr_setstate(unsigned long sysino, unsigned long intr_state);
+#endif
+
/* intr_gettarget()
* TRAP: HV_FAST_TRAP
* FUNCTION: HV_FAST_INTR_GETTARGET
@@ -1275,6 +1291,10 @@ extern unsigned long sun4v_devino_to_sysino(unsigned long devhandle,
*/
#define HV_FAST_INTR_GETTARGET 0xa5
+#ifndef __ASSEMBLY__
+extern unsigned long sun4v_intr_gettarget(unsigned long sysino);
+#endif
+
/* intr_settarget()
* TRAP: HV_FAST_TRAP
* FUNCTION: HV_FAST_INTR_SETTARGET
@@ -1288,6 +1308,10 @@ extern unsigned long sun4v_devino_to_sysino(unsigned long devhandle,
*/
#define HV_FAST_INTR_SETTARGET 0xa6
+#ifndef __ASSEMBLY__
+extern void sun4v_intr_settarget(unsigned long sysino, unsigned long cpuid);
+#endif
+
/* PCI IO services.
*
* See the terminology descriptions in the device interrupt services