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authorSergei Shtylylov <sshtylyov@ru.mvista.com>2006-01-25 21:27:10 +0300
committerRalf Baechle <ralf@linux-mips.org>2006-02-07 13:30:23 +0000
commit80730555af2ef1932bd8b9943333e8837dddfacc (patch)
tree881772d4c6d1b59bc7d3d101dad9465a2af1c682
parent6fe2a5681fff0cbeaf9a2d3778661be62a7f2f06 (diff)
[MIPS] Au1xx0: really set KSEG0 to uncached on reboot
Fix a really old buglet in AMD Au1xx0 restart code: instead of modifying the whole CP0 Config.K0 field to 010b (meaning KSEG0 uncached) before flushing the caches and resetting a board, it only sets bit 1 of that reg. which is effectively a NOP since Config.K0 == 011b as the kernel sets it up (which is also its default value for Au1xx0). Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-rw-r--r--arch/mips/au1000/common/reset.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/au1000/common/reset.c b/arch/mips/au1000/common/reset.c
index 65b84db800e..4ffccedf596 100644
--- a/arch/mips/au1000/common/reset.c
+++ b/arch/mips/au1000/common/reset.c
@@ -151,7 +151,7 @@ void au1000_restart(char *command)
}
set_c0_status(ST0_BEV | ST0_ERL);
- set_c0_config(CONF_CM_UNCACHED);
+ change_c0_config(CONF_CM_CMASK, CONF_CM_UNCACHED);
flush_cache_all();
write_c0_wired(0);