diff options
author | Manu Abraham <abraham.manu@gmail.com> | 2007-11-19 16:44:47 -0300 |
---|---|---|
committer | Mauro Carvalho Chehab <mchehab@redhat.com> | 2008-12-30 09:38:00 -0200 |
commit | f2e52cd17622eed39576f113b77bbd18c577e308 (patch) | |
tree | 5b8bbf752ea82aa4260912a7c89f4fff55239efc | |
parent | 07b9bf7de5d91594eb79bcd43129fe5df94bdd28 (diff) |
V4L/DVB (9442): Revert back previous change to 90MHz
Note:
* At High Symbol Rates we do not have enouph machine cycles to handle the
incoming symbols and hence might run into problems at the very end of the
specified definition
* Most of the equations have been calculated for a master clock of 99 MHz,
running at 90MHz, raises lot of issues such as the need to recalculate
all of them , which is eventually very painful.
Signed-off-by: Manu Abraham <manu@linuxtv.org>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
-rw-r--r-- | drivers/media/dvb/ttpci/budget-av.c | 2 | ||||
-rw-r--r-- | drivers/media/dvb/ttpci/budget-ci.c | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/drivers/media/dvb/ttpci/budget-av.c b/drivers/media/dvb/ttpci/budget-av.c index ed9b06b4b30..f996cef79ec 100644 --- a/drivers/media/dvb/ttpci/budget-av.c +++ b/drivers/media/dvb/ttpci/budget-av.c @@ -965,7 +965,7 @@ static const struct stb0899_s1_reg knc1_stb0899_s1_init_1[] = { { STB0899_GPIO37CFG , 0x82 }, { STB0899_GPIO38CFG , 0x82 }, { STB0899_GPIO39CFG , 0x82 }, - { STB0899_NCOARSE , 0x13 }, /* 0x13 = 27 Mhz Clock, F/3 = 180MHz, F/6 = 90MHz */ + { STB0899_NCOARSE , 0x15 }, /* 0x15 = 27 Mhz Clock, F/3 = 198MHz, F/6 = 99MHz */ { STB0899_SYNTCTRL , 0x02 }, /* 0x00 = CLK from CLKI, 0x02 = CLK from XTALI */ { STB0899_FILTCTRL , 0x00 }, { STB0899_SYSCTRL , 0x00 }, diff --git a/drivers/media/dvb/ttpci/budget-ci.c b/drivers/media/dvb/ttpci/budget-ci.c index 2a1b79d67b6..3507463fdac 100644 --- a/drivers/media/dvb/ttpci/budget-ci.c +++ b/drivers/media/dvb/ttpci/budget-ci.c @@ -1154,7 +1154,7 @@ static const struct stb0899_s1_reg tt3200_stb0899_s1_init_1[] = { { STB0899_GPIO37CFG , 0x82 }, { STB0899_GPIO38CFG , 0x82 }, { STB0899_GPIO39CFG , 0x82 }, - { STB0899_NCOARSE , 0x13 }, /* 0x13 = 27 Mhz Clock, F/3 = 180MHz, F/6 = 90MHz */ + { STB0899_NCOARSE , 0x15 }, /* 0x15 = 27 Mhz Clock, F/3 = 198MHz, F/6 = 99MHz */ { STB0899_SYNTCTRL , 0x02 }, /* 0x00 = CLK from CLKI, 0x02 = CLK from XTALI */ { STB0899_FILTCTRL , 0x00 }, { STB0899_SYSCTRL , 0x00 }, |