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authorJesper Nilsson <jespern@stork.se.axis.com>2007-11-29 17:24:10 +0100
committerJesper Nilsson <jesper.nilsson@axis.com>2008-02-08 11:06:23 +0100
commitf74c31d50c3c568abf315f9b8b206a4ec7b9c9f6 (patch)
tree337ab18553fb782797cc354c6c46f4090fbac4d0
parent58d083192825c5fbd46fa0b1ff4d1ecc9118b692 (diff)
CRIS v32: Add L2 cache initialization code.
-rw-r--r--arch/cris/arch-v32/mm/l2cache.c29
1 files changed, 29 insertions, 0 deletions
diff --git a/arch/cris/arch-v32/mm/l2cache.c b/arch/cris/arch-v32/mm/l2cache.c
new file mode 100644
index 00000000000..332ff10dcc6
--- /dev/null
+++ b/arch/cris/arch-v32/mm/l2cache.c
@@ -0,0 +1,29 @@
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/string.h>
+#include <memmap.h>
+#include <hwregs/reg_map.h>
+#include <hwregs/reg_rdwr.h>
+#include <hwregs/l2cache_defs.h>
+#include <asm/io.h>
+
+#define L2CACHE_SIZE 64
+
+int __init l2cache_init(void)
+{
+ reg_l2cache_rw_ctrl ctrl = {0};
+ reg_l2cache_rw_cfg cfg = {.en = regk_l2cache_yes};
+
+ ctrl.csize = L2CACHE_SIZE;
+ ctrl.cbase = L2CACHE_SIZE / 4 + (L2CACHE_SIZE % 4 ? 1 : 0);
+ REG_WR(l2cache, regi_l2cache, rw_ctrl, ctrl);
+
+ /* Flush the tag memory */
+ memset((void *)(MEM_INTMEM_START | MEM_NON_CACHEABLE), 0, 2*1024);
+
+ /* Enable the cache */
+ REG_WR(l2cache, regi_l2cache, rw_cfg, cfg);
+
+ return 0;
+}
+