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authorDave Jones <davej@redhat.com>2009-10-14 16:31:39 -0400
committerJesse Barnes <jbarnes@virtuousgeek.org>2009-11-04 08:47:12 -0800
commit76b1a87b217927f905f4b01c586452b2a1d33913 (patch)
tree02a0f0e1a94cdb5507e441a7ff655e9c772d97d4 /CREDITS
parent98e724c791924c0dfc5b1dcf053ed3841cc89c78 (diff)
x86/PCI: Use generic cacheline sizing instead of per-vendor tests.
Instead of the PCI code needing to have code to determine the cacheline size of each processor, use the data the cpu identification code should have already determined during early boot. (The vendor checks are also incomplete, and don't take into account modern CPUs) I've been carrying a variant of this code in Fedora for a while, that prints debug information. There are a number of cases where we are currently setting the PCI cacheline size to 32 bytes, when the CPU cacheline size is 64 bytes. With this patch, we set them both the same. Signed-off-by: Dave Jones <davej@redhat.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
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