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authorThomas Bogendoerfer <tsbogend@alpha.franken.de>2008-07-08 14:46:34 +0200
committerRalf Baechle <ralf@linux-mips.org>2008-07-08 19:33:46 +0100
commit14defd90f5281da8a1bf43bc789efbafe5991cd8 (patch)
tree82d4cd90fe401ab70331cb94cd6c3f8fd53bf96c /Documentation/i386/zero-page.txt
parentb32dfbb9c54393af32761add16e249664193621f (diff)
[MIPS] Fix 32bit kernels on R4k with 128 byte cache line size
The generated copy_page for R4k CPU with a 128 byte cache line size used Create Dirty Exclusive cache line operations even if only part of the cache line was filled. This change avoids generating cache operations, if only part of the cache line size is copied in one loop. It also increases the maxmimum loop size, because the generated code even fits into the available space for r4k CPUs with 128 byte cache line size. Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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