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authorGuennadi Liakhovetski <g.liakhovetski@gmx.de>2009-03-31 03:44:22 -0300
committerMauro Carvalho Chehab <mchehab@redhat.com>2009-04-06 21:43:48 -0300
commite951cbf20cdc7c55c9c752d28411d956675befd6 (patch)
tree733210c5d359d8828ce2d0a600a5bbcd85242a2e /Documentation/sound/alsa/seq_oss.html
parenteee1663fa71e32b146a584cb9a7c22bb6302ec14 (diff)
V4L/DVB (11326): mt9m001: fix advertised pixel clock polarity
MT9M001 datasheet says, that the data is ready on the falling edge of the pixel clock, but the driver wrongly sets the SOCAM_PCLK_SAMPLE_RISING flag. Changing this doesn't seem to produce any visible difference, still, it is better to comply to the datasheet. Reported-by: Sascha Oppermann <oppermann@garage-computers.com> Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
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