diff options
author | Paul Mackerras <paulus@samba.org> | 2008-04-14 21:11:02 +1000 |
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committer | Paul Mackerras <paulus@samba.org> | 2008-04-14 21:11:02 +1000 |
commit | ac7c5353b189e10cf5dd27399f64f7b013abffc6 (patch) | |
tree | 8222d92b774c256d6ec4399c716d76b3f05ddc4b /Documentation/spi/spi-summary | |
parent | a8f75ea70c58546205fb7673be41455b9da5d9a7 (diff) | |
parent | 120dd64cacd4fb796bca0acba3665553f1d9ecaa (diff) |
Merge branch 'linux-2.6'
Diffstat (limited to 'Documentation/spi/spi-summary')
-rw-r--r-- | Documentation/spi/spi-summary | 15 |
1 files changed, 14 insertions, 1 deletions
diff --git a/Documentation/spi/spi-summary b/Documentation/spi/spi-summary index 8861e47e5a2..6d5f18143c5 100644 --- a/Documentation/spi/spi-summary +++ b/Documentation/spi/spi-summary @@ -116,6 +116,13 @@ low order bit. So when a chip's timing diagram shows the clock starting low (CPOL=0) and data stabilized for sampling during the trailing clock edge (CPHA=1), that's SPI mode 1. +Note that the clock mode is relevant as soon as the chipselect goes +active. So the master must set the clock to inactive before selecting +a slave, and the slave can tell the chosen polarity by sampling the +clock level when its select line goes active. That's why many devices +support for example both modes 0 and 3: they don't care about polarity, +and alway clock data in/out on rising clock edges. + How do these driver programming interfaces work? ------------------------------------------------ @@ -379,8 +386,14 @@ any more such messages. + when bidirectional reads and writes start ... by how its sequence of spi_transfer requests is arranged; + + which I/O buffers are used ... each spi_transfer wraps a + buffer for each transfer direction, supporting full duplex + (two pointers, maybe the same one in both cases) and half + duplex (one pointer is NULL) transfers; + + optionally defining short delays after transfers ... using - the spi_transfer.delay_usecs setting; + the spi_transfer.delay_usecs setting (this delay can be the + only protocol effect, if the buffer length is zero); + whether the chipselect becomes inactive after a transfer and any delay ... by using the spi_transfer.cs_change flag; |