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authorMichael Chan <mchan@broadcom.com>2007-07-07 22:51:03 -0700
committerDavid S. Miller <davem@sunset.davemloft.net>2007-07-10 22:18:35 -0700
commitb8a7ce7bedb2134acb731e08e588ad92087a40ff (patch)
tree2d18138f5c9697f71861c37f94aa2e7cbfc5228b /Documentation/time_interpolators.txt
parent9b1084b8f99a6b5e97c0c9bc1b4455db4fa51a07 (diff)
[BNX2]: Reduce spurious INTA interrupts.
Spurious interrupts are often encountered especially on systems using the 8259 PIC mode. This is because the I/O write to deassert the interrupt is posted and won't get to the chip immediately. As a result, the IRQ may remain asserted after the IRQ handler exits, causing spurious interrupts. Add read back to flush the I/O write to deassert the IRQ immediately. We also store the last_status_idx immediately in the IRQ handler to help detect whether the interrupt is ours or not when the IRQ is entered again before ->poll gets called. Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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