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authorJames Morris <jmorris@namei.org>2008-08-28 10:47:34 +1000
committerJames Morris <jmorris@namei.org>2008-08-28 10:47:34 +1000
commit86d688984deefa3ae5a802880c11f2b408b5d6cf (patch)
tree7ea5e8189b0a774626d3ed7c3c87df2495a4c4a0 /arch/alpha/include/asm/hardirq.h
parent93c06cbbf9fea5d5be1778febb7fa9ab1a74e5f5 (diff)
parent4c246edd2550304df5b766cc841584b2bb058843 (diff)
Merge branch 'master' into next
Diffstat (limited to 'arch/alpha/include/asm/hardirq.h')
-rw-r--r--arch/alpha/include/asm/hardirq.h30
1 files changed, 30 insertions, 0 deletions
diff --git a/arch/alpha/include/asm/hardirq.h b/arch/alpha/include/asm/hardirq.h
new file mode 100644
index 00000000000..d953e234daa
--- /dev/null
+++ b/arch/alpha/include/asm/hardirq.h
@@ -0,0 +1,30 @@
+#ifndef _ALPHA_HARDIRQ_H
+#define _ALPHA_HARDIRQ_H
+
+#include <linux/threads.h>
+#include <linux/cache.h>
+
+
+/* entry.S is sensitive to the offsets of these fields */
+typedef struct {
+ unsigned long __softirq_pending;
+} ____cacheline_aligned irq_cpustat_t;
+
+#include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */
+
+void ack_bad_irq(unsigned int irq);
+
+#define HARDIRQ_BITS 12
+
+/*
+ * The hardirq mask has to be large enough to have
+ * space for potentially nestable IRQ sources in the system
+ * to nest on a single CPU. On Alpha, interrupts are masked at the CPU
+ * by IPL as well as at the system level. We only have 8 IPLs (UNIX PALcode)
+ * so we really only have 8 nestable IRQs, but allow some overhead
+ */
+#if (1 << HARDIRQ_BITS) < 16
+#error HARDIRQ_BITS is too low!
+#endif
+
+#endif /* _ALPHA_HARDIRQ_H */