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authorAtsushi Nemoto <anemo@mba.ocn.ne.jp>2008-06-24 23:26:38 +0900
committerRalf Baechle <ralf@linux-mips.org>2008-07-03 19:14:27 +0100
commit8986d2f50e1a9ba63f64ccbf59181886aa7898c3 (patch)
tree0fde3d8ff52cb4cac35348c2464939fc7b6fc9e9 /arch/alpha
parent7e3297dc280f88ec0c6619a895f3d449776f952e (diff)
[MIPS] cevt-txx9: Reset timer counter on initialization
The txx9_tmr_init() will not clear a timer counter register in a certain case. The counter register is cleared on 1->0 transition of TCE bit if CRE=1. So just clearing the TCE bit is not enough. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/alpha')
0 files changed, 0 insertions, 0 deletions