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authorLennert Buytenhek <buytenh@wantstofly.org>2007-02-05 00:55:27 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2007-02-08 14:48:44 +0000
commit850b42933e70c19c7765dd7fad15cb7ad3955b65 (patch)
treec57d1f3e65a26ad9af2f75540aea49be256322ac /arch/arm/common
parentae0a846e411dc0b568e8ccda584896310ee5f369 (diff)
[ARM] 4123/1: xsc3: general cleanup
This patch cleans up proc-xsc3: - Correct a number of typos. - Fix up indentation in a number of places. - Change references to the various caches to be more clear about whether we're talking about the L1 D, the L1 I or the unified L2 cache. - Rename "drain write buffer" to "data write barrier", the official name used in the Manzano manual. - Change the xsc3 cpu name from "XScale-Core3" to "XScale-V3 based processor". Also, since a previously merged patch implements proper support for using a MAC or iWMMXt coprocessor on xsc3 platforms, we no longer need to enable access to CP0 on boot. Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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