diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2009-05-02 16:40:20 -0700 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2009-05-02 16:40:20 -0700 |
commit | 2142babac999a5ba169348892a8e3ac222bec7a4 (patch) | |
tree | eb862396a9864b34e2335b7cc0c6114c56f9ec1a /arch/arm/mach-davinci/include/mach/mux.h | |
parent | bb402c4fb5bba4edf5b8c72b3db8760e60df4876 (diff) | |
parent | 0516e4643cd22fc9f535aef02ad1de66c382c93b (diff) |
Merge master.kernel.org:/home/rmk/linux-2.6-arm
* master.kernel.org:/home/rmk/linux-2.6-arm: (45 commits)
[ARM] 5489/1: ARM errata: Data written to the L2 cache can be overwritten with stale data
[ARM] 5490/1: ARM errata: Processor deadlock when a false hazard is created
[ARM] 5487/1: ARM errata: Stale prediction on replaced interworking branch
[ARM] 5488/1: ARM errata: Invalidation of the Instruction Cache operation can fail
davinci: DM644x: NAND: update partitioning
davinci: update DM644x support in preparation for more SoCs
davinci: DM644x: rename board file
davinci: update pin-multiplexing support
davinci: serial: generalize for more SoCs
davinci: DM355 IRQ Definitions
davinci: DM646x: add interrupt number and priorities
davinci: PSC: Clear bits in MDCTL reg before setting new bits
davinci: gpio bugfixes
davinci: add EDMA driver
davinci: timers: use clk_get_rate()
[ARM] pxa/littleton: add missing da9034 touchscreen support
[ARM] pxa/zylonite: configure GPIO18/19 correctly, used by 2 GPIO expanders
[ARM] pxa/zylonite: fix the issue of unused SDATA_IN_1 pin get AC97 not working
[ARM] pxa: make ads7846 on corgi and spitz to sync on HSYNC
[ARM] pxa: remove unused CPU_FREQ_PXA Kconfig symbol
...
Diffstat (limited to 'arch/arm/mach-davinci/include/mach/mux.h')
-rw-r--r-- | arch/arm/mach-davinci/include/mach/mux.h | 220 |
1 files changed, 174 insertions, 46 deletions
diff --git a/arch/arm/mach-davinci/include/mach/mux.h b/arch/arm/mach-davinci/include/mach/mux.h index c24b6782804..bae22cb3e27 100644 --- a/arch/arm/mach-davinci/include/mach/mux.h +++ b/arch/arm/mach-davinci/include/mach/mux.h @@ -1,55 +1,183 @@ /* - * DaVinci pin multiplexing defines + * Table of the DAVINCI register configurations for the PINMUX combinations * * Author: Vladimir Barinov, MontaVista Software, Inc. <source@mvista.com> * + * Based on linux/include/asm-arm/arch-omap/mux.h: + * Copyright (C) 2003 - 2005 Nokia Corporation + * + * Written by Tony Lindgren + * * 2007 (c) MontaVista Software, Inc. This file is licensed under * the terms of the GNU General Public License version 2. This program * is licensed "as is" without any warranty of any kind, whether express * or implied. + * + * Copyright (C) 2008 Texas Instruments. */ -#ifndef __ASM_ARCH_MUX_H -#define __ASM_ARCH_MUX_H - -#define DAVINCI_MUX_AEAW0 0 -#define DAVINCI_MUX_AEAW1 1 -#define DAVINCI_MUX_AEAW2 2 -#define DAVINCI_MUX_AEAW3 3 -#define DAVINCI_MUX_AEAW4 4 -#define DAVINCI_MUX_AECS4 10 -#define DAVINCI_MUX_AECS5 11 -#define DAVINCI_MUX_VLYNQWD0 12 -#define DAVINCI_MUX_VLYNQWD1 13 -#define DAVINCI_MUX_VLSCREN 14 -#define DAVINCI_MUX_VLYNQEN 15 -#define DAVINCI_MUX_HDIREN 16 -#define DAVINCI_MUX_ATAEN 17 -#define DAVINCI_MUX_RGB666 22 -#define DAVINCI_MUX_RGB888 23 -#define DAVINCI_MUX_LOEEN 24 -#define DAVINCI_MUX_LFLDEN 25 -#define DAVINCI_MUX_CWEN 26 -#define DAVINCI_MUX_CFLDEN 27 -#define DAVINCI_MUX_HPIEN 29 -#define DAVINCI_MUX_1394EN 30 -#define DAVINCI_MUX_EMACEN 31 - -#define DAVINCI_MUX_LEVEL2 32 -#define DAVINCI_MUX_UART0 (DAVINCI_MUX_LEVEL2 + 0) -#define DAVINCI_MUX_UART1 (DAVINCI_MUX_LEVEL2 + 1) -#define DAVINCI_MUX_UART2 (DAVINCI_MUX_LEVEL2 + 2) -#define DAVINCI_MUX_U2FLO (DAVINCI_MUX_LEVEL2 + 3) -#define DAVINCI_MUX_PWM0 (DAVINCI_MUX_LEVEL2 + 4) -#define DAVINCI_MUX_PWM1 (DAVINCI_MUX_LEVEL2 + 5) -#define DAVINCI_MUX_PWM2 (DAVINCI_MUX_LEVEL2 + 6) -#define DAVINCI_MUX_I2C (DAVINCI_MUX_LEVEL2 + 7) -#define DAVINCI_MUX_SPI (DAVINCI_MUX_LEVEL2 + 8) -#define DAVINCI_MUX_MSTK (DAVINCI_MUX_LEVEL2 + 9) -#define DAVINCI_MUX_ASP (DAVINCI_MUX_LEVEL2 + 10) -#define DAVINCI_MUX_CLK0 (DAVINCI_MUX_LEVEL2 + 16) -#define DAVINCI_MUX_CLK1 (DAVINCI_MUX_LEVEL2 + 17) -#define DAVINCI_MUX_TIMIN (DAVINCI_MUX_LEVEL2 + 18) - -extern void davinci_mux_peripheral(unsigned int mux, unsigned int enable); - -#endif /* __ASM_ARCH_MUX_H */ + +#ifndef __INC_MACH_MUX_H +#define __INC_MACH_MUX_H + +/* System module registers */ +#define PINMUX0 0x00 +#define PINMUX1 0x04 +/* dm355 only */ +#define PINMUX2 0x08 +#define PINMUX3 0x0c +#define PINMUX4 0x10 +#define INTMUX 0x18 +#define EVTMUX 0x1c + +struct mux_config { + const char *name; + const char *mux_reg_name; + const unsigned char mux_reg; + const unsigned char mask_offset; + const unsigned char mask; + const unsigned char mode; + bool debug; +}; + +enum davinci_dm644x_index { + /* ATA and HDDIR functions */ + DM644X_HDIREN, + DM644X_ATAEN, + DM644X_ATAEN_DISABLE, + + /* HPI functions */ + DM644X_HPIEN_DISABLE, + + /* AEAW functions */ + DM644X_AEAW, + + /* Memory Stick */ + DM644X_MSTK, + + /* I2C */ + DM644X_I2C, + + /* ASP function */ + DM644X_MCBSP, + + /* UART1 */ + DM644X_UART1, + + /* UART2 */ + DM644X_UART2, + + /* PWM0 */ + DM644X_PWM0, + + /* PWM1 */ + DM644X_PWM1, + + /* PWM2 */ + DM644X_PWM2, + + /* VLYNQ function */ + DM644X_VLYNQEN, + DM644X_VLSCREN, + DM644X_VLYNQWD, + + /* EMAC and MDIO function */ + DM644X_EMACEN, + + /* GPIO3V[0:16] pins */ + DM644X_GPIO3V, + + /* GPIO pins */ + DM644X_GPIO0, + DM644X_GPIO3, + DM644X_GPIO43_44, + DM644X_GPIO46_47, + + /* VPBE */ + DM644X_RGB666, + + /* LCD */ + DM644X_LOEEN, + DM644X_LFLDEN, +}; + +enum davinci_dm646x_index { + /* ATA function */ + DM646X_ATAEN, + + /* AUDIO Clock */ + DM646X_AUDCK1, + DM646X_AUDCK0, + + /* CRGEN Control */ + DM646X_CRGMUX, + + /* VPIF Control */ + DM646X_STSOMUX_DISABLE, + DM646X_STSIMUX_DISABLE, + DM646X_PTSOMUX_DISABLE, + DM646X_PTSIMUX_DISABLE, + + /* TSIF Control */ + DM646X_STSOMUX, + DM646X_STSIMUX, + DM646X_PTSOMUX_PARALLEL, + DM646X_PTSIMUX_PARALLEL, + DM646X_PTSOMUX_SERIAL, + DM646X_PTSIMUX_SERIAL, +}; + +enum davinci_dm355_index { + /* MMC/SD 0 */ + DM355_MMCSD0, + + /* MMC/SD 1 */ + DM355_SD1_CLK, + DM355_SD1_CMD, + DM355_SD1_DATA3, + DM355_SD1_DATA2, + DM355_SD1_DATA1, + DM355_SD1_DATA0, + + /* I2C */ + DM355_I2C_SDA, + DM355_I2C_SCL, + + /* ASP0 function */ + DM355_MCBSP0_BDX, + DM355_MCBSP0_X, + DM355_MCBSP0_BFSX, + DM355_MCBSP0_BDR, + DM355_MCBSP0_R, + DM355_MCBSP0_BFSR, + + /* SPI0 */ + DM355_SPI0_SDI, + DM355_SPI0_SDENA0, + DM355_SPI0_SDENA1, + + /* IRQ muxing */ + DM355_INT_EDMA_CC, + DM355_INT_EDMA_TC0_ERR, + DM355_INT_EDMA_TC1_ERR, + + /* EDMA event muxing */ + DM355_EVT8_ASP1_TX, + DM355_EVT9_ASP1_RX, + DM355_EVT26_MMC0_RX, +}; + +#ifdef CONFIG_DAVINCI_MUX +/* setup pin muxing */ +extern void davinci_mux_init(void); +extern int davinci_mux_register(const struct mux_config *pins, + unsigned long size); +extern int davinci_cfg_reg(unsigned long reg_cfg); +#else +/* boot loader does it all (no warnings from CONFIG_DAVINCI_MUX_WARNINGS) */ +static inline void davinci_mux_init(void) {} +static inline int davinci_mux_register(const struct mux_config *pins, + unsigned long size) { return 0; } +static inline int davinci_cfg_reg(unsigned long reg_cfg) { return 0; } +#endif + +#endif /* __INC_MACH_MUX_H */ |