diff options
| author | Len Brown <len.brown@intel.com> | 2009-04-05 02:14:15 -0400 |
|---|---|---|
| committer | Len Brown <len.brown@intel.com> | 2009-04-05 02:14:15 -0400 |
| commit | 478c6a43fcbc6c11609f8cee7c7b57223907754f (patch) | |
| tree | a7f7952099da60d33032aed6de9c0c56c9f8779e /arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h | |
| parent | 8a3f257c704e02aee9869decd069a806b45be3f1 (diff) | |
| parent | 6bb597507f9839b13498781e481f5458aea33620 (diff) | |
Merge branch 'linus' into release
Conflicts:
arch/x86/kernel/cpu/cpufreq/longhaul.c
Signed-off-by: Len Brown <len.brown@intel.com>
Diffstat (limited to 'arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h')
| -rw-r--r-- | arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h | 42 |
1 files changed, 32 insertions, 10 deletions
diff --git a/arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h b/arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h index ad9c888dd85..97c530f66e7 100644 --- a/arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h +++ b/arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h @@ -604,6 +604,7 @@ #define DCMD_LENGTH 0x01fff /* length mask (max = 8K - 1) */ /* "fuse" bits of IXP_EXP_CFG2 */ +/* All IXP4xx CPUs */ #define IXP4XX_FEATURE_RCOMP (1 << 0) #define IXP4XX_FEATURE_USB_DEVICE (1 << 1) #define IXP4XX_FEATURE_HASH (1 << 2) @@ -619,20 +620,41 @@ #define IXP4XX_FEATURE_RESET_NPEB (1 << 12) #define IXP4XX_FEATURE_RESET_NPEC (1 << 13) #define IXP4XX_FEATURE_PCI (1 << 14) -#define IXP4XX_FEATURE_ECC_TIMESYNC (1 << 15) #define IXP4XX_FEATURE_UTOPIA_PHY_LIMIT (3 << 16) +#define IXP4XX_FEATURE_XSCALE_MAX_FREQ (3 << 22) +#define IXP42X_FEATURE_MASK (IXP4XX_FEATURE_RCOMP | \ + IXP4XX_FEATURE_USB_DEVICE | \ + IXP4XX_FEATURE_HASH | \ + IXP4XX_FEATURE_AES | \ + IXP4XX_FEATURE_DES | \ + IXP4XX_FEATURE_HDLC | \ + IXP4XX_FEATURE_AAL | \ + IXP4XX_FEATURE_HSS | \ + IXP4XX_FEATURE_UTOPIA | \ + IXP4XX_FEATURE_NPEB_ETH0 | \ + IXP4XX_FEATURE_NPEC_ETH | \ + IXP4XX_FEATURE_RESET_NPEA | \ + IXP4XX_FEATURE_RESET_NPEB | \ + IXP4XX_FEATURE_RESET_NPEC | \ + IXP4XX_FEATURE_PCI | \ + IXP4XX_FEATURE_UTOPIA_PHY_LIMIT | \ + IXP4XX_FEATURE_XSCALE_MAX_FREQ) + + +/* IXP43x/46x CPUs */ +#define IXP4XX_FEATURE_ECC_TIMESYNC (1 << 15) #define IXP4XX_FEATURE_USB_HOST (1 << 18) #define IXP4XX_FEATURE_NPEA_ETH (1 << 19) +#define IXP43X_FEATURE_MASK (IXP42X_FEATURE_MASK | \ + IXP4XX_FEATURE_ECC_TIMESYNC | \ + IXP4XX_FEATURE_USB_HOST | \ + IXP4XX_FEATURE_NPEA_ETH) + +/* IXP46x CPU (including IXP455) only */ #define IXP4XX_FEATURE_NPEB_ETH_1_TO_3 (1 << 20) #define IXP4XX_FEATURE_RSA (1 << 21) -#define IXP4XX_FEATURE_XSCALE_MAX_FREQ (3 << 22) -#define IXP4XX_FEATURE_RESERVED (0xFF << 24) - -#define IXP4XX_FEATURE_IXP46X_ONLY (IXP4XX_FEATURE_ECC_TIMESYNC | \ - IXP4XX_FEATURE_USB_HOST | \ - IXP4XX_FEATURE_NPEA_ETH | \ - IXP4XX_FEATURE_NPEB_ETH_1_TO_3 | \ - IXP4XX_FEATURE_RSA | \ - IXP4XX_FEATURE_XSCALE_MAX_FREQ) +#define IXP46X_FEATURE_MASK (IXP43X_FEATURE_MASK | \ + IXP4XX_FEATURE_NPEB_ETH_1_TO_3 | \ + IXP4XX_FEATURE_RSA) #endif |