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author | Lennert Buytenhek <buytenh@wantstofly.org> | 2009-11-07 14:49:18 +0100 |
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committer | Nicolas Pitre <nico@fluxnic.net> | 2009-11-07 20:14:21 -0500 |
commit | 35f029e2514be209eb0e88c7d927f3bcc42a5cc2 (patch) | |
tree | 671a2d2ff57277a97633d81b1e3a54781a7e2da7 /arch/arm/mach-kirkwood/include/mach/kirkwood.h | |
parent | 6de95c198729d34a85c88f8844f1c3d57fb6da00 (diff) |
[ARM] kirkwood: fix PCI I/O port assignment
Instead of allocating PCI devices I/O port bus addresses from the
000xxxxx I/O port range as intended, due to a bus versus physical
address mixup, the Kirkwood PCIe handling code inadvertently
allocated I/O port bus addresses from the f20xxxxx address range
(which is the physical address range of the PCIe I/O mapping window),
but then direct all I/O port accesses to bus addresses 000xxxxx,
which would then not be decoded at all.
Fix this by setting the base address of the PCIe I/O space struct
resource to KIRKWOOD_PCIE_IO_BUS_BASE instead of the incorrect
KIRKWOOD_PCIE_IO_PHYS_BASE, and fix up __io() to expect addresses
offsetted by the former instead of the latter.
(The suggested fix of directing I/O port accesses from the host to
bus addresses f20xxxxx instead has the problem that assigning full
32bit I/O port bus addresses (f20xxxxx) doesn't work on all PCI
devices, as not all PCI devices implement full 32 bit BAR registers
for I/O ports. We should really try to allocate I/O port bus
addresses that fit in 16 bits.)
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
Diffstat (limited to 'arch/arm/mach-kirkwood/include/mach/kirkwood.h')
0 files changed, 0 insertions, 0 deletions