diff options
author | Russell King <rmk@dyn-67.arm.linux.org.uk> | 2008-08-05 16:14:15 +0100 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2008-08-07 09:55:48 +0100 |
commit | a09e64fbc0094e3073dbb09c3b4bfe4ab669244b (patch) | |
tree | 69689f467179891b498bd7423fcf61925173db31 /arch/arm/mach-kirkwood/include/mach | |
parent | a1b81a84fff05dbfef45b7012c26e1fee9973e5d (diff) |
[ARM] Move include/asm-arm/arch-* to arch/arm/*/include/mach
This just leaves include/asm-arm/plat-* to deal with.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-kirkwood/include/mach')
-rw-r--r-- | arch/arm/mach-kirkwood/include/mach/debug-macro.S | 20 | ||||
-rw-r--r-- | arch/arm/mach-kirkwood/include/mach/dma.h | 1 | ||||
-rw-r--r-- | arch/arm/mach-kirkwood/include/mach/entry-macro.S | 40 | ||||
-rw-r--r-- | arch/arm/mach-kirkwood/include/mach/hardware.h | 21 | ||||
-rw-r--r-- | arch/arm/mach-kirkwood/include/mach/io.h | 26 | ||||
-rw-r--r-- | arch/arm/mach-kirkwood/include/mach/irqs.h | 63 | ||||
-rw-r--r-- | arch/arm/mach-kirkwood/include/mach/kirkwood.h | 100 | ||||
-rw-r--r-- | arch/arm/mach-kirkwood/include/mach/memory.h | 14 | ||||
-rw-r--r-- | arch/arm/mach-kirkwood/include/mach/system.h | 37 | ||||
-rw-r--r-- | arch/arm/mach-kirkwood/include/mach/timex.h | 11 | ||||
-rw-r--r-- | arch/arm/mach-kirkwood/include/mach/uncompress.h | 47 | ||||
-rw-r--r-- | arch/arm/mach-kirkwood/include/mach/vmalloc.h | 5 |
12 files changed, 385 insertions, 0 deletions
diff --git a/arch/arm/mach-kirkwood/include/mach/debug-macro.S b/arch/arm/mach-kirkwood/include/mach/debug-macro.S new file mode 100644 index 00000000000..c0cc5b5c82a --- /dev/null +++ b/arch/arm/mach-kirkwood/include/mach/debug-macro.S @@ -0,0 +1,20 @@ +/* + * arch/arm/mach-kirkwood/include/mach/debug-macro.S + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#include <mach/kirkwood.h> + + .macro addruart,rx + mrc p15, 0, \rx, c1, c0 + tst \rx, #1 @ MMU enabled? + ldreq \rx, =KIRKWOOD_REGS_PHYS_BASE + ldrne \rx, =KIRKWOOD_REGS_VIRT_BASE + orr \rx, \rx, #0x00012000 + .endm + +#define UART_SHIFT 2 +#include <asm/hardware/debug-8250.S> diff --git a/arch/arm/mach-kirkwood/include/mach/dma.h b/arch/arm/mach-kirkwood/include/mach/dma.h new file mode 100644 index 00000000000..40a8c178f10 --- /dev/null +++ b/arch/arm/mach-kirkwood/include/mach/dma.h @@ -0,0 +1 @@ +/* empty */ diff --git a/arch/arm/mach-kirkwood/include/mach/entry-macro.S b/arch/arm/mach-kirkwood/include/mach/entry-macro.S new file mode 100644 index 00000000000..83e0cba77b3 --- /dev/null +++ b/arch/arm/mach-kirkwood/include/mach/entry-macro.S @@ -0,0 +1,40 @@ +/* + * arch/arm/mach-kirkwood/include/mach/entry-macro.S + * + * Low-level IRQ helper macros for Marvell Kirkwood platforms + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#include <mach/kirkwood.h> + + .macro disable_fiq + .endm + + .macro arch_ret_to_user, tmp1, tmp2 + .endm + + .macro get_irqnr_preamble, base, tmp + ldr \base, =IRQ_VIRT_BASE + .endm + + .macro get_irqnr_and_base, irqnr, irqstat, base, tmp + @ check low interrupts + ldr \irqstat, [\base, #IRQ_CAUSE_LOW_OFF] + ldr \tmp, [\base, #IRQ_MASK_LOW_OFF] + mov \irqnr, #31 + ands \irqstat, \irqstat, \tmp + bne 1001f + + @ if no low interrupts set, check high interrupts + ldr \irqstat, [\base, #IRQ_CAUSE_HIGH_OFF] + ldr \tmp, [\base, #IRQ_MASK_HIGH_OFF] + mov \irqnr, #63 + ands \irqstat, \irqstat, \tmp + + @ find first active interrupt source +1001: clzne \irqstat, \irqstat + subne \irqnr, \irqnr, \irqstat + .endm diff --git a/arch/arm/mach-kirkwood/include/mach/hardware.h b/arch/arm/mach-kirkwood/include/mach/hardware.h new file mode 100644 index 00000000000..cde85283f7d --- /dev/null +++ b/arch/arm/mach-kirkwood/include/mach/hardware.h @@ -0,0 +1,21 @@ +/* + * arch/arm/mach-kirkwood/include/mach/hardware.h + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ASM_ARCH_HARDWARE_H +#define __ASM_ARCH_HARDWARE_H + +#include "kirkwood.h" + +#define pcibios_assign_all_busses() 1 + +#define PCIBIOS_MIN_IO 0x00001000 +#define PCIBIOS_MIN_MEM 0x01000000 +#define PCIMEM_BASE KIRKWOOD_PCIE_MEM_PHYS_BASE /* mem base for VGA */ + + +#endif diff --git a/arch/arm/mach-kirkwood/include/mach/io.h b/arch/arm/mach-kirkwood/include/mach/io.h new file mode 100644 index 00000000000..be07be0ef52 --- /dev/null +++ b/arch/arm/mach-kirkwood/include/mach/io.h @@ -0,0 +1,26 @@ +/* + * arch/arm/mach-kirkwood/include/mach/io.h + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef __ASM_ARCH_IO_H +#define __ASM_ARCH_IO_H + +#include "kirkwood.h" + +#define IO_SPACE_LIMIT 0xffffffff + +static inline void __iomem *__io(unsigned long addr) +{ + return (void __iomem *)((addr - KIRKWOOD_PCIE_IO_PHYS_BASE) + + KIRKWOOD_PCIE_IO_VIRT_BASE); +} + +#define __io(a) __io(a) +#define __mem_pci(a) (a) + + +#endif diff --git a/arch/arm/mach-kirkwood/include/mach/irqs.h b/arch/arm/mach-kirkwood/include/mach/irqs.h new file mode 100644 index 00000000000..6fd05838c72 --- /dev/null +++ b/arch/arm/mach-kirkwood/include/mach/irqs.h @@ -0,0 +1,63 @@ +/* + * arch/arm/mach-kirkwood/include/mach/irqs.h + * + * IRQ definitions for Marvell Kirkwood SoCs + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef __ASM_ARCH_IRQS_H +#define __ASM_ARCH_IRQS_H + +#include "kirkwood.h" /* need GPIO_MAX */ + +/* + * Low Interrupt Controller + */ +#define IRQ_KIRKWOOD_HIGH_SUM 0 +#define IRQ_KIRKWOOD_BRIDGE 1 +#define IRQ_KIRKWOOD_HOST2CPU 2 +#define IRQ_KIRKWOOD_CPU2HOST 3 +#define IRQ_KIRKWOOD_XOR_00 5 +#define IRQ_KIRKWOOD_XOR_01 6 +#define IRQ_KIRKWOOD_XOR_10 7 +#define IRQ_KIRKWOOD_XOR_11 8 +#define IRQ_KIRKWOOD_PCIE 9 +#define IRQ_KIRKWOOD_GE00_SUM 11 +#define IRQ_KIRKWOOD_GE01_SUM 15 +#define IRQ_KIRKWOOD_USB 19 +#define IRQ_KIRKWOOD_SATA 21 +#define IRQ_KIRKWOOD_CRYPTO 22 +#define IRQ_KIRKWOOD_SPI 23 +#define IRQ_KIRKWOOD_I2S 24 +#define IRQ_KIRKWOOD_TS_0 26 +#define IRQ_KIRKWOOD_SDIO 28 +#define IRQ_KIRKWOOD_TWSI 29 +#define IRQ_KIRKWOOD_AVB 30 +#define IRQ_KIRKWOOD_TDMI 31 + +/* + * High Interrupt Controller + */ +#define IRQ_KIRKWOOD_UART_0 33 +#define IRQ_KIRKWOOD_UART_1 34 +#define IRQ_KIRKWOOD_GPIO_LOW_0_7 35 +#define IRQ_KIRKWOOD_GPIO_LOW_8_15 36 +#define IRQ_KIRKWOOD_GPIO_LOW_16_23 37 +#define IRQ_KIRKWOOD_GPIO_LOW_24_31 38 +#define IRQ_KIRKWOOD_GPIO_HIGH_0_7 39 +#define IRQ_KIRKWOOD_GPIO_HIGH_8_15 40 +#define IRQ_KIRKWOOD_GPIO_HIGH_16_23 41 + +/* + * KIRKWOOD General Purpose Pins + */ +#define IRQ_KIRKWOOD_GPIO_START 64 +#define NR_GPIO_IRQS GPIO_MAX + +#define NR_IRQS (IRQ_KIRKWOOD_GPIO_START + NR_GPIO_IRQS) + + +#endif diff --git a/arch/arm/mach-kirkwood/include/mach/kirkwood.h b/arch/arm/mach-kirkwood/include/mach/kirkwood.h new file mode 100644 index 00000000000..d1336b41f0f --- /dev/null +++ b/arch/arm/mach-kirkwood/include/mach/kirkwood.h @@ -0,0 +1,100 @@ +/* + * arch/arm/mach-kirkwood/include/mach/kirkwood.h + * + * Generic definitions for Marvell Kirkwood SoC flavors: + * 88F6180, 88F6192 and 88F6281. + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef __ASM_ARCH_KIRKWOOD_H +#define __ASM_ARCH_KIRKWOOD_H + +/* + * Marvell Kirkwood address maps. + * + * phys + * e0000000 PCIe Memory space + * f1000000 on-chip peripheral registers + * f2000000 PCIe I/O space + * f3000000 NAND controller address window + * + * virt phys size + * fee00000 f1000000 1M on-chip peripheral registers + * fef00000 f2000000 1M PCIe I/O space + */ + +#define KIRKWOOD_NAND_MEM_PHYS_BASE 0xf3000000 +#define KIRKWOOD_NAND_MEM_SIZE SZ_64K /* 1K is sufficient, but 64K + * is the minimal window size + */ + +#define KIRKWOOD_PCIE_IO_PHYS_BASE 0xf2000000 +#define KIRKWOOD_PCIE_IO_VIRT_BASE 0xfef00000 +#define KIRKWOOD_PCIE_IO_BUS_BASE 0x00000000 +#define KIRKWOOD_PCIE_IO_SIZE SZ_1M + +#define KIRKWOOD_REGS_PHYS_BASE 0xf1000000 +#define KIRKWOOD_REGS_VIRT_BASE 0xfee00000 +#define KIRKWOOD_REGS_SIZE SZ_1M + +#define KIRKWOOD_PCIE_MEM_PHYS_BASE 0xe0000000 +#define KIRKWOOD_PCIE_MEM_SIZE SZ_128M + +/* + * MBUS bridge registers. + */ +#define BRIDGE_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0x20000) +#define CPU_CONTROL (BRIDGE_VIRT_BASE | 0x0104) +#define CPU_RESET 0x00000002 +#define RSTOUTn_MASK (BRIDGE_VIRT_BASE | 0x0108) +#define SOFT_RESET_OUT_EN 0x00000004 +#define SYSTEM_SOFT_RESET (BRIDGE_VIRT_BASE | 0x010c) +#define SOFT_RESET 0x00000001 +#define BRIDGE_CAUSE (BRIDGE_VIRT_BASE | 0x0110) +#define BRIDGE_MASK (BRIDGE_VIRT_BASE | 0x0114) +#define BRIDGE_INT_TIMER0 0x0002 +#define BRIDGE_INT_TIMER1 0x0004 +#define BRIDGE_INT_TIMER1_CLR (~0x0004) +#define IRQ_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0200) +#define IRQ_CAUSE_LOW_OFF 0x0000 +#define IRQ_MASK_LOW_OFF 0x0004 +#define IRQ_CAUSE_HIGH_OFF 0x0010 +#define IRQ_MASK_HIGH_OFF 0x0014 +#define TIMER_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0300) +#define L2_CONFIG_REG (BRIDGE_VIRT_BASE | 0x0128) +#define L2_WRITETHROUGH 0x00000010 + +/* + * Register Map + */ +#define DDR_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0x00000) +#define DDR_WINDOW_CPU_BASE (DDR_VIRT_BASE | 0x1500) + +#define DEV_BUS_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x10000) +#define DEV_BUS_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0x10000) +#define SAMPLE_AT_RESET (DEV_BUS_VIRT_BASE | 0x0030) +#define DEVICE_ID (DEV_BUS_VIRT_BASE | 0x0034) +#define RTC_PHYS_BASE (DEV_BUS_PHYS_BASE | 0x0300) +#define SPI_PHYS_BASE (DEV_BUS_PHYS_BASE | 0x0600) +#define UART0_PHYS_BASE (DEV_BUS_PHYS_BASE | 0x2000) +#define UART0_VIRT_BASE (DEV_BUS_VIRT_BASE | 0x2000) +#define UART1_PHYS_BASE (DEV_BUS_PHYS_BASE | 0x2100) +#define UART1_VIRT_BASE (DEV_BUS_VIRT_BASE | 0x2100) + +#define PCIE_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0x40000) + +#define USB_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x50000) + +#define GE00_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x70000) +#define GE01_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x74000) + +#define SATA_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x80000) + + +#define GPIO_MAX 50 + + +#endif diff --git a/arch/arm/mach-kirkwood/include/mach/memory.h b/arch/arm/mach-kirkwood/include/mach/memory.h new file mode 100644 index 00000000000..b5fb34bdccd --- /dev/null +++ b/arch/arm/mach-kirkwood/include/mach/memory.h @@ -0,0 +1,14 @@ +/* + * arch/arm/mach-kirkwood/include/mach/memory.h + */ + +#ifndef __ASM_ARCH_MEMORY_H +#define __ASM_ARCH_MEMORY_H + +#define PHYS_OFFSET UL(0x00000000) + +#define __virt_to_bus(x) __virt_to_phys(x) +#define __bus_to_virt(x) __phys_to_virt(x) + + +#endif diff --git a/arch/arm/mach-kirkwood/include/mach/system.h b/arch/arm/mach-kirkwood/include/mach/system.h new file mode 100644 index 00000000000..8510f6cfdab --- /dev/null +++ b/arch/arm/mach-kirkwood/include/mach/system.h @@ -0,0 +1,37 @@ +/* + * arch/arm/mach-kirkwood/include/mach/system.h + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef __ASM_ARCH_SYSTEM_H +#define __ASM_ARCH_SYSTEM_H + +#include <mach/hardware.h> +#include <mach/kirkwood.h> + +static inline void arch_idle(void) +{ + cpu_do_idle(); +} + +static inline void arch_reset(char mode) +{ + /* + * Enable soft reset to assert RSTOUTn. + */ + writel(SOFT_RESET_OUT_EN, RSTOUTn_MASK); + + /* + * Assert soft reset. + */ + writel(SOFT_RESET, SYSTEM_SOFT_RESET); + + while (1) + ; +} + + +#endif diff --git a/arch/arm/mach-kirkwood/include/mach/timex.h b/arch/arm/mach-kirkwood/include/mach/timex.h new file mode 100644 index 00000000000..f77ef4a32c5 --- /dev/null +++ b/arch/arm/mach-kirkwood/include/mach/timex.h @@ -0,0 +1,11 @@ +/* + * arch/arm/mach-kirkwood/include/mach/timex.h + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#define CLOCK_TICK_RATE (100 * HZ) + +#define KIRKWOOD_TCLK 166666667 diff --git a/arch/arm/mach-kirkwood/include/mach/uncompress.h b/arch/arm/mach-kirkwood/include/mach/uncompress.h new file mode 100644 index 00000000000..75d5497df3a --- /dev/null +++ b/arch/arm/mach-kirkwood/include/mach/uncompress.h @@ -0,0 +1,47 @@ +/* + * arch/arm/mach-kirkwood/include/mach/uncompress.h + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#include <linux/serial_reg.h> +#include <mach/kirkwood.h> + +#define SERIAL_BASE ((unsigned char *)UART0_PHYS_BASE) + +static void putc(const char c) +{ + unsigned char *base = SERIAL_BASE; + int i; + + for (i = 0; i < 0x1000; i++) { + if (base[UART_LSR << 2] & UART_LSR_THRE) + break; + barrier(); + } + + base[UART_TX << 2] = c; +} + +static void flush(void) +{ + unsigned char *base = SERIAL_BASE; + unsigned char mask; + int i; + + mask = UART_LSR_TEMT | UART_LSR_THRE; + + for (i = 0; i < 0x1000; i++) { + if ((base[UART_LSR << 2] & mask) == mask) + break; + barrier(); + } +} + +/* + * nothing to do + */ +#define arch_decomp_setup() +#define arch_decomp_wdog() diff --git a/arch/arm/mach-kirkwood/include/mach/vmalloc.h b/arch/arm/mach-kirkwood/include/mach/vmalloc.h new file mode 100644 index 00000000000..8f48260dcda --- /dev/null +++ b/arch/arm/mach-kirkwood/include/mach/vmalloc.h @@ -0,0 +1,5 @@ +/* + * arch/arm/mach-kirkwood/include/mach/vmalloc.h + */ + +#define VMALLOC_END 0xfe800000 |