diff options
| author | Amit Kucheria <amit.kucheria@canonical.com> | 2010-02-04 12:21:53 -0800 |
|---|---|---|
| committer | Amit Kucheria <amit.kucheria@canonical.com> | 2010-02-09 18:32:16 +0200 |
| commit | a329b48c43e5e2e6b51ce159d99aefeb90c7c066 (patch) | |
| tree | 007238749bf1aeeb567344122d800b9b5b6e7b12 /arch/arm/mach-mx5/cpu.c | |
| parent | 438caa3f6c91ba21c539a8547c4075b619dc6500 (diff) | |
mxc: Core support for Freescale i.MX5 series
Add basic clock support, cpu identification, I/O mapping, interrupt
controller, serial port and ethernet.
Signed-off-by: Amit Kucheria <amit.kucheria@canonical.com>
Diffstat (limited to 'arch/arm/mach-mx5/cpu.c')
| -rw-r--r-- | arch/arm/mach-mx5/cpu.c | 47 |
1 files changed, 47 insertions, 0 deletions
diff --git a/arch/arm/mach-mx5/cpu.c b/arch/arm/mach-mx5/cpu.c new file mode 100644 index 00000000000..41c769f08c4 --- /dev/null +++ b/arch/arm/mach-mx5/cpu.c @@ -0,0 +1,47 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + * + * This file contains the CPU initialization code. + */ + +#include <linux/types.h> +#include <linux/kernel.h> +#include <linux/init.h> +#include <mach/hardware.h> +#include <asm/io.h> + +static int __init post_cpu_init(void) +{ + unsigned int reg; + void __iomem *base; + + if (!cpu_is_mx51()) + return 0; + + base = MX51_IO_ADDRESS(MX51_AIPS1_BASE_ADDR); + __raw_writel(0x0, base + 0x40); + __raw_writel(0x0, base + 0x44); + __raw_writel(0x0, base + 0x48); + __raw_writel(0x0, base + 0x4C); + reg = __raw_readl(base + 0x50) & 0x00FFFFFF; + __raw_writel(reg, base + 0x50); + + base = MX51_IO_ADDRESS(MX51_AIPS2_BASE_ADDR); + __raw_writel(0x0, base + 0x40); + __raw_writel(0x0, base + 0x44); + __raw_writel(0x0, base + 0x48); + __raw_writel(0x0, base + 0x4C); + reg = __raw_readl(base + 0x50) & 0x00FFFFFF; + __raw_writel(reg, base + 0x50); + + return 0; +} + +postcore_initcall(post_cpu_init); |