aboutsummaryrefslogtreecommitdiff
path: root/arch/arm/mach-mx5
diff options
context:
space:
mode:
authorSascha Hauer <s.hauer@pengutronix.de>2010-03-18 16:56:30 +0100
committerSascha Hauer <s.hauer@pengutronix.de>2010-03-19 11:05:40 +0100
commit3d1bc8626c7b17facfcb7fb5dee4686f47a1e75d (patch)
treeae6732273dfd063bca549c5bfd8e855c2d886896 /arch/arm/mach-mx5
parent1b6a2b2d0ff2ced5fe608e0b2e13ccd2b7a283e5 (diff)
i.MX51: map TZIC dynamically
This looks cleaner and allows us to call mx51_revision later when we can use ioremap to determine the silicon revision dynamically. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/mach-mx5')
-rw-r--r--arch/arm/mach-mx5/mm.c27
1 files changed, 13 insertions, 14 deletions
diff --git a/arch/arm/mach-mx5/mm.c b/arch/arm/mach-mx5/mm.c
index c21e18be7af..9fe7beb32da 100644
--- a/arch/arm/mach-mx5/mm.c
+++ b/arch/arm/mach-mx5/mm.c
@@ -35,11 +35,6 @@ static struct map_desc mxc_io_desc[] __initdata = {
.length = MX51_DEBUG_SIZE,
.type = MT_DEVICE
}, {
- .virtual = MX51_TZIC_BASE_ADDR_VIRT,
- .pfn = __phys_to_pfn(MX51_TZIC_BASE_ADDR),
- .length = MX51_TZIC_SIZE,
- .type = MT_DEVICE
- }, {
.virtual = MX51_AIPS1_BASE_ADDR_VIRT,
.pfn = __phys_to_pfn(MX51_AIPS1_BASE_ADDR),
.length = MX51_AIPS1_SIZE,
@@ -69,14 +64,6 @@ static struct map_desc mxc_io_desc[] __initdata = {
*/
void __init mx51_map_io(void)
{
- u32 tzic_addr;
-
- if (mx51_revision() < MX51_CHIP_REV_2_0)
- tzic_addr = 0x8FFFC000;
- else
- tzic_addr = 0xE0003000;
- mxc_io_desc[2].pfn = __phys_to_pfn(tzic_addr);
-
mxc_set_cpu_type(MXC_CPU_MX51);
mxc_iomux_v3_init(MX51_IO_ADDRESS(MX51_IOMUXC_BASE_ADDR));
mxc_arch_reset_init(MX51_IO_ADDRESS(MX51_WDOG_BASE_ADDR));
@@ -85,5 +72,17 @@ void __init mx51_map_io(void)
void __init mx51_init_irq(void)
{
- tzic_init_irq(MX51_IO_ADDRESS(MX51_TZIC_BASE_ADDR));
+ unsigned long tzic_addr;
+ void __iomem *tzic_virt;
+
+ if (mx51_revision() < MX51_CHIP_REV_2_0)
+ tzic_addr = MX51_TZIC_BASE_ADDR_TO1;
+ else
+ tzic_addr = MX51_TZIC_BASE_ADDR;
+
+ tzic_virt = ioremap(tzic_addr, SZ_16K);
+ if (!tzic_virt)
+ panic("unable to map TZIC interrupt controller\n");
+
+ tzic_init_irq(tzic_virt);
}