Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm

* 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (95 commits)
  [ARM] 4578/1: CM-x270: PCMCIA support
  [ARM] 4577/1: ITE 8152 PCI bridge support
  [ARM] 4576/1: CM-X270 machine support
  [ARM] pxa: Avoid pxa_gpio_mode() in gpio_direction_{in,out}put()
  [ARM] pxa: move pxa_set_mode() from pxa2xx_mainstone.c to mainstone.c
  [ARM] pxa: move pxa_set_mode() from pxa2xx_lubbock.c to lubbock.c
  [ARM] pxa: Make cpu_is_pxaXXX dependent on configuration symbols
  [ARM] pxa: PXA3xx base support
  [NET] smc91x: fix PXA DMA support code
  [SERIAL] Fix console initialisation ordering
  [ARM] pxa: tidy up arch/arm/mach-pxa/Makefile
  [ARM] Update arch/arm/Kconfig for drivers/Kconfig changes
  [ARM] 4600/1: fix kernel build failure with build-id-supporting binutils
  [ARM] 4599/1: Preserve ATAG list for use with kexec (2.6.23)
  [ARM] Rename consistent_sync() as dma_cache_maint()
  [ARM] 4572/1: ep93xx: add cirrus logic edb9307 support
  [ARM] 4596/1: S3C2412: Correct IRQs for SDI+CF and add decoding support
  [ARM] 4595/1: ns9xxx: define registers as void __iomem * instead of volatile u32
  [ARM] 4594/1: ns9xxx: use the new gpio functions
  [ARM] 4593/1: ns9xxx: implement generic clockevents
  ...

1 files changed, 134 insertions, 38 deletions

diff --git a/arch/arm/mach-ns9xxx/time.c b/arch/arm/mach-ns9xxx/time.c
index b97d0c54a38..c3dd1f4acb9 100644
--- a/arch/arm/mach-ns9xxx/time.c
+++ b/arch/arm/mach-ns9xxx/time.c
@@ -11,78 +11,174 @@
 #include <linux/jiffies.h>
 #include <linux/interrupt.h>
 #include <linux/irq.h>
+#include <linux/stringify.h>
+#include <linux/clocksource.h>
+#include <linux/clockchips.h>
+
 #include <asm/arch-ns9xxx/regs-sys.h>
 #include <asm/arch-ns9xxx/clock.h>
 #include <asm/arch-ns9xxx/irqs.h>
 #include <asm/arch/system.h>
 #include "generic.h"
 
-#define TIMERCLOCKSELECT 64
+#define TIMER_CLOCKSOURCE 0
+#define TIMER_CLOCKEVENT 1
+static u32 latch;
+
+static cycle_t ns9xxx_clocksource_read(void)
+{
+	return __raw_readl(SYS_TR(TIMER_CLOCKSOURCE));
+}
 
-static u32 usecs_per_tick;
+static struct clocksource ns9xxx_clocksource = {
+	.name	= "ns9xxx-timer" __stringify(TIMER_CLOCKSOURCE),
+	.rating	= 300,
+	.read	= ns9xxx_clocksource_read,
+	.mask	= CLOCKSOURCE_MASK(32),
+	.shift	= 20,
+	.flags	= CLOCK_SOURCE_IS_CONTINUOUS,
+};
 
-static irqreturn_t
-ns9xxx_timer_interrupt(int irq, void *dev_id)
+static void ns9xxx_clockevent_setmode(enum clock_event_mode mode,
+		struct clock_event_device *clk)
 {
-	write_seqlock(&xtime_lock);
-	timer_tick();
-	write_sequnlock(&xtime_lock);
+	u32 tc = __raw_readl(SYS_TC(TIMER_CLOCKEVENT));
+
+	switch(mode) {
+	case CLOCK_EVT_MODE_PERIODIC:
+		__raw_writel(latch, SYS_TRC(TIMER_CLOCKEVENT));
+		REGSET(tc, SYS_TCx, REN, EN);
+		REGSET(tc, SYS_TCx, INTS, EN);
+		REGSET(tc, SYS_TCx, TEN, EN);
+		break;
+
+	case CLOCK_EVT_MODE_ONESHOT:
+		REGSET(tc, SYS_TCx, REN, DIS);
+		REGSET(tc, SYS_TCx, INTS, EN);
+
+		/* fall through */
+
+	case CLOCK_EVT_MODE_UNUSED:
+	case CLOCK_EVT_MODE_SHUTDOWN:
+	case CLOCK_EVT_MODE_RESUME:
+	default:
+		REGSET(tc, SYS_TCx, TEN, DIS);
+		break;
+	}
+
+	__raw_writel(tc, SYS_TC(TIMER_CLOCKEVENT));
+}
 
-	return IRQ_HANDLED;
+static int ns9xxx_clockevent_setnextevent(unsigned long evt,
+		struct clock_event_device *clk)
+{
+	u32 tc = __raw_readl(SYS_TC(TIMER_CLOCKEVENT));
+
+	if (REGGET(tc, SYS_TCx, TEN)) {
+		REGSET(tc, SYS_TCx, TEN, DIS);
+		__raw_writel(tc, SYS_TC(TIMER_CLOCKEVENT));
+	}
+
+	REGSET(tc, SYS_TCx, TEN, EN);
+
+	__raw_writel(evt, SYS_TRC(TIMER_CLOCKEVENT));
+
+	__raw_writel(tc, SYS_TC(TIMER_CLOCKEVENT));
+
+	return 0;
 }
 
-static unsigned long ns9xxx_timer_gettimeoffset(void)
+static struct clock_event_device ns9xxx_clockevent_device = {
+	.name		= "ns9xxx-timer" __stringify(TIMER_CLOCKEVENT),
+	.shift		= 20,
+	.features	= CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
+	.set_mode	= ns9xxx_clockevent_setmode,
+	.set_next_event	= ns9xxx_clockevent_setnextevent,
+};
+
+static irqreturn_t ns9xxx_clockevent_handler(int irq, void *dev_id)
 {
-	/* return the microseconds which have passed since the last interrupt
-	 * was _serviced_.  That is, if an interrupt is pending or the counter
-	 * reloads, return one period more. */
+	int timerno = irq - IRQ_TIMER0;
+	u32 tc;
 
-	u32 counter1 = SYS_TR(0);
-	int pending = SYS_ISR & (1 << IRQ_TIMER0);
-	u32 counter2 = SYS_TR(0);
-	u32 elapsed;
+	struct clock_event_device *evt = &ns9xxx_clockevent_device;
 
-	if (pending || counter2 > counter1)
-		elapsed = 2 * SYS_TRC(0) - counter2;
-	else
-		elapsed = SYS_TRC(0) - counter1;
+	/* clear irq */
+	tc = __raw_readl(SYS_TC(timerno));
+	if (REGGET(tc, SYS_TCx, REN) == SYS_TCx_REN_DIS) {
+		REGSET(tc, SYS_TCx, TEN, DIS);
+		__raw_writel(tc, SYS_TC(timerno));
+	}
+	REGSET(tc, SYS_TCx, INTC, SET);
+	__raw_writel(tc, SYS_TC(timerno));
+	REGSET(tc, SYS_TCx, INTC, UNSET);
+	__raw_writel(tc, SYS_TC(timerno));
 
-	return (elapsed * usecs_per_tick) >> 16;
+	evt->event_handler(evt);
 
+	return IRQ_HANDLED;
 }
 
-static struct irqaction ns9xxx_timer_irq = {
-	.name = "NS9xxx Timer Tick",
-	.flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
-	.handler = ns9xxx_timer_interrupt,
+static struct irqaction ns9xxx_clockevent_action = {
+	.name		= "ns9xxx-timer" __stringify(TIMER_CLOCKEVENT),
+	.flags		= IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
+	.handler	= ns9xxx_clockevent_handler,
 };
 
 static void __init ns9xxx_timer_init(void)
 {
 	int tc;
 
-	usecs_per_tick =
-		SH_DIV(1000000 * TIMERCLOCKSELECT, ns9xxx_cpuclock(), 16);
+	tc = __raw_readl(SYS_TC(TIMER_CLOCKSOURCE));
+	if (REGGET(tc, SYS_TCx, TEN)) {
+		REGSET(tc, SYS_TCx, TEN, DIS);
+		__raw_writel(tc, SYS_TC(TIMER_CLOCKSOURCE));
+	}
 
-	/* disable timer */
-	if ((tc = SYS_TC(0)) & SYS_TCx_TEN)
-		SYS_TC(0) = tc & ~SYS_TCx_TEN;
-
-	SYS_TRC(0) = SH_DIV(ns9xxx_cpuclock(), (TIMERCLOCKSELECT * HZ), 0);
+	__raw_writel(0, SYS_TRC(TIMER_CLOCKSOURCE));
 
 	REGSET(tc, SYS_TCx, TEN, EN);
-	REGSET(tc, SYS_TCx, TLCS, DIV64); /* This must match TIMERCLOCKSELECT */
-	REGSET(tc, SYS_TCx, INTS, EN);
-	REGSET(tc, SYS_TCx, UDS, DOWN);
 	REGSET(tc, SYS_TCx, TDBG, STOP);
+	REGSET(tc, SYS_TCx, TLCS, CPU);
+	REGSET(tc, SYS_TCx, TM, IEE);
+	REGSET(tc, SYS_TCx, INTS, DIS);
+	REGSET(tc, SYS_TCx, UDS, UP);
 	REGSET(tc, SYS_TCx, TSZ, 32);
 	REGSET(tc, SYS_TCx, REN, EN);
-	SYS_TC(0) = tc;
 
-	setup_irq(IRQ_TIMER0, &ns9xxx_timer_irq);
+	__raw_writel(tc, SYS_TC(TIMER_CLOCKSOURCE));
+
+	ns9xxx_clocksource.mult = clocksource_hz2mult(ns9xxx_cpuclock(),
+			ns9xxx_clocksource.shift);
+
+	clocksource_register(&ns9xxx_clocksource);
+
+	latch = SH_DIV(ns9xxx_cpuclock(), HZ, 0);
+
+	tc = __raw_readl(SYS_TC(TIMER_CLOCKEVENT));
+	REGSET(tc, SYS_TCx, TEN, DIS);
+	REGSET(tc, SYS_TCx, TDBG, STOP);
+	REGSET(tc, SYS_TCx, TLCS, CPU);
+	REGSET(tc, SYS_TCx, TM, IEE);
+	REGSET(tc, SYS_TCx, INTS, DIS);
+	REGSET(tc, SYS_TCx, UDS, DOWN);
+	REGSET(tc, SYS_TCx, TSZ, 32);
+	REGSET(tc, SYS_TCx, REN, EN);
+	__raw_writel(tc, SYS_TC(TIMER_CLOCKEVENT));
+
+	ns9xxx_clockevent_device.mult = div_sc(ns9xxx_cpuclock(),
+			NSEC_PER_SEC, ns9xxx_clockevent_device.shift);
+	ns9xxx_clockevent_device.max_delta_ns =
+		clockevent_delta2ns(-1, &ns9xxx_clockevent_device);
+	ns9xxx_clockevent_device.min_delta_ns =
+		clockevent_delta2ns(1, &ns9xxx_clockevent_device);
+
+	ns9xxx_clockevent_device.cpumask = cpumask_of_cpu(0);
+	clockevents_register_device(&ns9xxx_clockevent_device);
+
+	setup_irq(IRQ_TIMER0 + TIMER_CLOCKEVENT, &ns9xxx_clockevent_action);
 }
 
 struct sys_timer ns9xxx_timer = {
 	.init = ns9xxx_timer_init,
-	.offset = ns9xxx_timer_gettimeoffset,
 };