diff options
| author | Ingo Molnar <mingo@elte.hu> | 2009-10-13 09:31:28 +0200 |
|---|---|---|
| committer | Ingo Molnar <mingo@elte.hu> | 2009-10-13 09:31:34 +0200 |
| commit | 9dbdd6c41c12fb42ee7188eafa7e1917b192af3a (patch) | |
| tree | 06a9eb894bc976c5c20e84ccd74fd82b9b71aed4 /arch/arm/mach-omap2/mailbox.c | |
| parent | 7a693d3f0d10f978ebdf3082c41404ab97106567 (diff) | |
| parent | 161291396e76e0832c08f617eb9bd364d1648148 (diff) | |
Merge commit 'v2.6.32-rc4' into perf/core
Merge reason: we were on an -rc1 base, merge up to -rc4.
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/arm/mach-omap2/mailbox.c')
| -rw-r--r-- | arch/arm/mach-omap2/mailbox.c | 33 |
1 files changed, 28 insertions, 5 deletions
diff --git a/arch/arm/mach-omap2/mailbox.c b/arch/arm/mach-omap2/mailbox.c index 6f71f3730c9..c035ad3426d 100644 --- a/arch/arm/mach-omap2/mailbox.c +++ b/arch/arm/mach-omap2/mailbox.c @@ -30,6 +30,14 @@ #define MAILBOX_IRQ_NEWMSG(u) (1 << (2 * (u))) #define MAILBOX_IRQ_NOTFULL(u) (1 << (2 * (u) + 1)) +/* SYSCONFIG: register bit definition */ +#define AUTOIDLE (1 << 0) +#define SOFTRESET (1 << 1) +#define SMARTIDLE (2 << 3) + +/* SYSSTATUS: register bit definition */ +#define RESETDONE (1 << 0) + #define MBOX_REG_SIZE 0x120 #define MBOX_NR_REGS (MBOX_REG_SIZE / sizeof(u32)) @@ -69,21 +77,33 @@ static inline void mbox_write_reg(u32 val, size_t ofs) /* Mailbox H/W preparations */ static int omap2_mbox_startup(struct omap_mbox *mbox) { - unsigned int l; + u32 l; + unsigned long timeout; mbox_ick_handle = clk_get(NULL, "mailboxes_ick"); if (IS_ERR(mbox_ick_handle)) { - printk("Could not get mailboxes_ick\n"); + pr_err("Can't get mailboxes_ick\n"); return -ENODEV; } clk_enable(mbox_ick_handle); + mbox_write_reg(SOFTRESET, MAILBOX_SYSCONFIG); + timeout = jiffies + msecs_to_jiffies(20); + do { + l = mbox_read_reg(MAILBOX_SYSSTATUS); + if (l & RESETDONE) + break; + } while (!time_after(jiffies, timeout)); + + if (!(l & RESETDONE)) { + pr_err("Can't take mmu out of reset\n"); + return -ENODEV; + } + l = mbox_read_reg(MAILBOX_REVISION); pr_info("omap mailbox rev %d.%d\n", (l & 0xf0) >> 4, (l & 0x0f)); - /* set smart-idle & autoidle */ - l = mbox_read_reg(MAILBOX_SYSCONFIG); - l |= 0x00000011; + l = SMARTIDLE | AUTOIDLE; mbox_write_reg(l, MAILBOX_SYSCONFIG); omap2_mbox_enable_irq(mbox, IRQ_RX); @@ -156,6 +176,9 @@ static void omap2_mbox_ack_irq(struct omap_mbox *mbox, u32 bit = (irq == IRQ_TX) ? p->notfull_bit : p->newmsg_bit; mbox_write_reg(bit, p->irqstatus); + + /* Flush posted write for irq status to avoid spurious interrupts */ + mbox_read_reg(p->irqstatus); } static int omap2_mbox_is_irq(struct omap_mbox *mbox, |