diff options
| author | Linus Torvalds <torvalds@linux-foundation.org> | 2008-03-12 17:56:37 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2008-03-12 17:56:37 -0700 |
| commit | 93d74463d018ddf05c169ad399e62e90e0f82fc0 (patch) | |
| tree | 887f61c90a9aab75060a3adbc20bcb8debd98e20 /arch/arm/mach-orion/addr-map.c | |
| parent | c463be3520065ef8c05e3cbdf946c69604e91ceb (diff) | |
| parent | 4c91363dc01310dc34f1621ef00d680b4404f71c (diff) | |
Merge master.kernel.org:/home/rmk/linux-2.6-arm
* master.kernel.org:/home/rmk/linux-2.6-arm: (26 commits)
[ARM] 4856/1: Orion: initialise the sixth PCIe MBUS mapping window as well
[ARM] 4855/1: Orion: use correct ethernet unit address range
[ARM] 4853/1: include uImage target in make help
[ARM] 4851/1: ns9xxx: fix size of gpiores
[ARM] AT91: correct at91sam9263ek LCD power gpio pin
[ARM] replace remaining __FUNCTION__ occurrences
[ARM] 4850/1: include generic pgtable.h for !CONFIG_MMU case
[ARM] 4849/1: move ATAGS asm definitions
[ARM] 4848/1: at91: remove false lockdep warnings
[ARM] 4847/1: kprobes: fix compilation with CONFIG_DEBUG_FS=y
[ARM] include/asm-arm - use angle brackets for includes
[ARM] 4845/1: Orion: Ignore memory tags with invalid data
ARM: OMAP2: Register the L4 io bus to boot OMAP2
ARM: OMAP1: Compile in other 16xx boards to OSK defconfig
ARM: OMAP1: Refresh H2 defconfig
ARM: OMAP1: Refresh OSK defconfig
ARM: OMAP: gpio lockdep updates
ARM: OMAP1: omap1/pm.c build fix
ARM: OMAP1: omap h2 regression fix
ARM: OMAP1: Fix compile for boards depending on old gpio expander
...
Diffstat (limited to 'arch/arm/mach-orion/addr-map.c')
| -rw-r--r-- | arch/arm/mach-orion/addr-map.c | 14 |
1 files changed, 10 insertions, 4 deletions
diff --git a/arch/arm/mach-orion/addr-map.c b/arch/arm/mach-orion/addr-map.c index 2e2fd63643c..58cc3c0333b 100644 --- a/arch/arm/mach-orion/addr-map.c +++ b/arch/arm/mach-orion/addr-map.c @@ -97,14 +97,20 @@ #define PCIE_BAR_CTRL(n) ORION_PCIE_REG(0x1804 + ((n - 1) * 4)) #define PCIE_BAR_LO(n) ORION_PCIE_REG(0x0010 + ((n) * 8)) #define PCIE_BAR_HI(n) ORION_PCIE_REG(0x0014 + ((n) * 8)) -#define PCIE_WIN_CTRL(n) ORION_PCIE_REG(0x1820 + ((n) << 4)) -#define PCIE_WIN_BASE(n) ORION_PCIE_REG(0x1824 + ((n) << 4)) -#define PCIE_WIN_REMAP(n) ORION_PCIE_REG(0x182c + ((n) << 4)) +#define PCIE_WIN_CTRL(n) (((n) < 5) ? \ + ORION_PCIE_REG(0x1820 + ((n) << 4)) : \ + ORION_PCIE_REG(0x1880)) +#define PCIE_WIN_BASE(n) (((n) < 5) ? \ + ORION_PCIE_REG(0x1824 + ((n) << 4)) : \ + ORION_PCIE_REG(0x1884)) +#define PCIE_WIN_REMAP(n) (((n) < 5) ? \ + ORION_PCIE_REG(0x182c + ((n) << 4)) : \ + ORION_PCIE_REG(0x188c)) #define PCIE_DEFWIN_CTRL ORION_PCIE_REG(0x18b0) #define PCIE_EXPROM_WIN_CTRL ORION_PCIE_REG(0x18c0) #define PCIE_EXPROM_WIN_REMP ORION_PCIE_REG(0x18c4) #define PCIE_MAX_BARS 3 -#define PCIE_MAX_WINS 5 +#define PCIE_MAX_WINS 6 /* * Use PCIE BAR '1' for all DDR banks |