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authorHaavard Skinnemoen <haavard.skinnemoen@atmel.com>2009-01-06 14:41:43 -0800
committerLinus Torvalds <torvalds@linux-foundation.org>2009-01-06 15:59:19 -0800
commit5ee36c989831ab720eee282521462cce0a3c4900 (patch)
treeae9e07d024bfa1d5f360aafc6401e3797350a7f5 /arch/arm/mach-s3c2410/include
parent5bfa26ca1332780dfeeabafd7f169fc6fb48ba30 (diff)
spi: atmel_spi update chipselect handling
This solves several issues: * It fixes the wrong idle clock polarity issue in a cleaner and less expensive way. * It handles the AT32AP7000 errata "SPI Chip Select 0 BITS field overrides other Chip Selects". Other chips, e.g. AT91SAM9261, have similar issues. Currently, the AT91RM9200 code path is left alone. But it might be interesting to try the same technique on RM9200 using a different CSR register. [dbrownell@users.sourceforge.net: restore debug message for activation] Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com> Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'arch/arm/mach-s3c2410/include')
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