diff options
author | Linus Torvalds <torvalds@g5.osdl.org> | 2006-03-22 17:32:09 -0800 |
---|---|---|
committer | Linus Torvalds <torvalds@g5.osdl.org> | 2006-03-22 17:32:09 -0800 |
commit | 591eb85ecd7e6eb8596c6129ae074e16636b99f4 (patch) | |
tree | 535fb7e9bc29113ff62fd70b0dcd8ad197ab51e2 /arch/arm/mach-sa1100 | |
parent | 4658f79bec0b51222e769e328c2923f39f3bda77 (diff) | |
parent | 3a2916aa289504d694072a98876d23ca31d6401e (diff) |
Merge master.kernel.org:/home/rmk/linux-2.6-arm
* master.kernel.org:/home/rmk/linux-2.6-arm: (45 commits)
[ARM] 3389/1: typo and grammar fix
[ARM] 3386/1: AT91RM9200 Clock update
[ARM] 3384/1: AT91RM9200: Timer
[ARM] 3382/1: ixp2000: unify defconfigs
[ARM] 3381/1: ixp2000: fix slowport write timing control register fields
[ARM] 3380/1: ixp2000: simplify ixdp2x00_master_npu() check
[ARM] 3379/1: ixp2000: use generic 8250 debug macros
[ARM] 3378/1: ixp2000: fix gpio interrupt handling
[ARM] Quieten spurious IRQ detection
[ARM] Use kcalloc to allocate counter_config array rather than kmalloc
[ARM] Oprofile: dynamically allocate counter_config
[ARM] Oprofile: Convert semaphore to mutex
[ARM] 3376/2: S3C2410 - update defconfig
[ARM] 3375/1: S3C2440 - fix osiris machine build
[ARM] 3374/1: ep93xx: gpio interrupt support
[ARM] 3361/1: S3C24XX - add USB bus clock source
[ARM] 3360/1: S3C2440 - add set rate methods and camera clock
[ARM] 3359/1: S3C24XX - add support for clk_set_rate
[ARM] Convert kmalloc+memset to kzalloc
[ARM] 3373/1: move uengine loader to arch/arm/common
...
Diffstat (limited to 'arch/arm/mach-sa1100')
-rw-r--r-- | arch/arm/mach-sa1100/Makefile | 2 | ||||
-rw-r--r-- | arch/arm/mach-sa1100/clock.c | 132 |
2 files changed, 133 insertions, 1 deletions
diff --git a/arch/arm/mach-sa1100/Makefile b/arch/arm/mach-sa1100/Makefile index e4a4a3e8aa8..e27f15042a2 100644 --- a/arch/arm/mach-sa1100/Makefile +++ b/arch/arm/mach-sa1100/Makefile @@ -3,7 +3,7 @@ # # Common support -obj-y := generic.o irq.o dma.o time.o +obj-y := clock.o generic.o irq.o dma.o time.o #nmi-oopser.o obj-m := obj-n := obj- := diff --git a/arch/arm/mach-sa1100/clock.c b/arch/arm/mach-sa1100/clock.c new file mode 100644 index 00000000000..b1e8fd766c1 --- /dev/null +++ b/arch/arm/mach-sa1100/clock.c @@ -0,0 +1,132 @@ +/* + * linux/arch/arm/mach-sa1100/clock.c + */ +#include <linux/module.h> +#include <linux/kernel.h> +#include <linux/list.h> +#include <linux/errno.h> +#include <linux/err.h> +#include <linux/string.h> +#include <linux/clk.h> +#include <linux/spinlock.h> + +#include <asm/hardware.h> +#include <asm/semaphore.h> + +struct clk { + struct list_head node; + unsigned long rate; + struct module *owner; + const char *name; + unsigned int enabled; + void (*enable)(void); + void (*disable)(void); +}; + +static LIST_HEAD(clocks); +static DECLARE_MUTEX(clocks_sem); +static DEFINE_SPINLOCK(clocks_lock); + +struct clk *clk_get(struct device *dev, const char *id) +{ + struct clk *p, *clk = ERR_PTR(-ENOENT); + + down(&clocks_sem); + list_for_each_entry(p, &clocks, node) { + if (strcmp(id, p->name) == 0 && try_module_get(p->owner)) { + clk = p; + break; + } + } + up(&clocks_sem); + + return clk; +} +EXPORT_SYMBOL(clk_get); + +void clk_put(struct clk *clk) +{ + module_put(clk->owner); +} +EXPORT_SYMBOL(clk_put); + +int clk_enable(struct clk *clk) +{ + unsigned long flags; + + spin_lock_irqsave(&clocks_lock, flags); + if (clk->enabled++ == 0) + clk->enable(); + spin_unlock_irqrestore(&clocks_lock, flags); + return 0; +} +EXPORT_SYMBOL(clk_enable); + +void clk_disable(struct clk *clk) +{ + unsigned long flags; + + WARN_ON(clk->enabled == 0); + + spin_lock_irqsave(&clocks_lock, flags); + if (--clk->enabled == 0) + clk->disable(); + spin_unlock_irqrestore(&clocks_lock, flags); +} +EXPORT_SYMBOL(clk_disable); + +unsigned long clk_get_rate(struct clk *clk) +{ + return clk->rate; +} +EXPORT_SYMBOL(clk_get_rate); + + +static void clk_gpio27_enable(void) +{ + /* + * First, set up the 3.6864MHz clock on GPIO 27 for the SA-1111: + * (SA-1110 Developer's Manual, section 9.1.2.1) + */ + GAFR |= GPIO_32_768kHz; + GPDR |= GPIO_32_768kHz; + TUCR = TUCR_3_6864MHz; +} + +static void clk_gpio27_disable(void) +{ + TUCR = 0; + GPDR &= ~GPIO_32_768kHz; + GAFR &= ~GPIO_32_768kHz; +} + +static struct clk clk_gpio27 = { + .name = "GPIO27_CLK", + .rate = 3686400, + .enable = clk_gpio27_enable, + .disable = clk_gpio27_disable, +}; + +int clk_register(struct clk *clk) +{ + down(&clocks_sem); + list_add(&clk->node, &clocks); + up(&clocks_sem); + return 0; +} +EXPORT_SYMBOL(clk_register); + +void clk_unregister(struct clk *clk) +{ + down(&clocks_sem); + list_del(&clk->node); + up(&clocks_sem); +} +EXPORT_SYMBOL(clk_unregister); + +static int __init clk_init(void) +{ + clk_register(&clk_gpio27); + return 0; +} +arch_initcall(clk_init); |