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authorDavid S. Miller <davem@davemloft.net>2009-06-15 03:02:23 -0700
committerDavid S. Miller <davem@davemloft.net>2009-06-15 03:02:23 -0700
commit9cbc1cb8cd46ce1f7645b9de249b2ce8460129bb (patch)
tree8d104ec2a459346b99413b0b77421ca7b9936c1a /arch/arm/mach-u300/padmux.c
parentca44d6e60f9de26281fda203f58b570e1748c015 (diff)
parent45e3e1935e2857c54783291107d33323b3ef33c8 (diff)
Merge branch 'master' of master.kernel.org:/pub/scm/linux/kernel/git/torvalds/linux-2.6
Conflicts: Documentation/feature-removal-schedule.txt drivers/scsi/fcoe/fcoe.c net/core/drop_monitor.c net/core/net-traces.c
Diffstat (limited to 'arch/arm/mach-u300/padmux.c')
-rw-r--r--arch/arm/mach-u300/padmux.c58
1 files changed, 58 insertions, 0 deletions
diff --git a/arch/arm/mach-u300/padmux.c b/arch/arm/mach-u300/padmux.c
new file mode 100644
index 00000000000..f3664564f08
--- /dev/null
+++ b/arch/arm/mach-u300/padmux.c
@@ -0,0 +1,58 @@
+/*
+ *
+ * arch/arm/mach-u300/padmux.c
+ *
+ *
+ * Copyright (C) 2009 ST-Ericsson AB
+ * License terms: GNU General Public License (GPL) version 2
+ * U300 PADMUX functions
+ * Author: Linus Walleij <linus.walleij@stericsson.com>
+ *
+ */
+#include <linux/io.h>
+#include <linux/err.h>
+#include <mach/u300-regs.h>
+#include <mach/syscon.h>
+
+#include "padmux.h"
+
+/* Set the PAD MUX to route the MMC reader correctly to GPIO0. */
+void pmx_set_mission_mode_mmc(void)
+{
+ u16 val;
+
+ val = readw(U300_SYSCON_VBASE + U300_SYSCON_PMC1LR);
+ val &= ~U300_SYSCON_PMC1LR_MMCSD_MASK;
+ writew(val, U300_SYSCON_VBASE + U300_SYSCON_PMC1LR);
+ val = readw(U300_SYSCON_VBASE + U300_SYSCON_PMC1HR);
+ val &= ~U300_SYSCON_PMC1HR_APP_GPIO_1_MASK;
+ val |= U300_SYSCON_PMC1HR_APP_GPIO_1_MMC;
+ writew(val, U300_SYSCON_VBASE + U300_SYSCON_PMC1HR);
+}
+
+void pmx_set_mission_mode_spi(void)
+{
+ u16 val;
+
+ /* Set up padmuxing so the SPI port and its chipselects are active */
+ val = readw(U300_SYSCON_VBASE + U300_SYSCON_PMC1HR);
+ /*
+ * Activate the SPI port (disable the use of these pins for generic
+ * GPIO, DSP, AAIF
+ */
+ val &= ~U300_SYSCON_PMC1HR_APP_SPI_2_MASK;
+ val |= U300_SYSCON_PMC1HR_APP_SPI_2_SPI;
+ /*
+ * Use GPIO pin SPI CS1 for CS1 actually (it can be used for other
+ * things also)
+ */
+ val &= ~U300_SYSCON_PMC1HR_APP_SPI_CS_1_MASK;
+ val |= U300_SYSCON_PMC1HR_APP_SPI_CS_1_SPI;
+ /*
+ * Use GPIO pin SPI CS2 for CS2 actually (it can be used for other
+ * things also)
+ */
+ val &= ~U300_SYSCON_PMC1HR_APP_SPI_CS_2_MASK;
+ val |= U300_SYSCON_PMC1HR_APP_SPI_CS_2_SPI;
+ writew(val, U300_SYSCON_VBASE + U300_SYSCON_PMC1HR);
+}