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authorHyok S. Choi <hyok.choi@samsung.com>2006-09-26 17:37:50 +0900
committerRussell King <rmk+kernel@arm.linux.org.uk>2006-09-27 17:39:17 +0100
commitb731c3118d87f26c8bf3f358ffbbc24450af50a6 (patch)
tree63e280a475d81eb39c16a7fbd4cd12568b4e1f1e /arch/arm/mm/Kconfig
parent07e0da78abdc679714a12e7a60137d950c346681 (diff)
[ARM] nommu: add ARM740T core support
This patch adds ARM740T core support which has a MPU and 4KB or 8KB cache. Signed-off-by: Hyok S. Choi <hyok.choi@samsung.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mm/Kconfig')
-rw-r--r--arch/arm/mm/Kconfig19
1 files changed, 17 insertions, 2 deletions
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index 9f860aa9c90..87f9fece960 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -75,6 +75,21 @@ config CPU_ARM720T
Say Y if you want support for the ARM720T processor.
Otherwise, say N.
+# ARM740T
+config CPU_ARM740T
+ bool "Support ARM740T processor" if ARCH_INTEGRATOR
+ select CPU_32v4T
+ select CPU_ABRT_LV4T
+ select CPU_CACHE_V3 # although the core is v4t
+ select CPU_CP15_MPU
+ help
+ A 32-bit RISC processor with 8KB cache or 4KB variants,
+ write buffer and MPU(Protection Unit) built around
+ an ARM7TDMI core.
+
+ Say Y if you want support for the ARM740T processor.
+ Otherwise, say N.
+
# ARM920T
config CPU_ARM920T
bool "Support ARM920T processor"
@@ -436,7 +451,7 @@ comment "Processor Features"
config ARM_THUMB
bool "Support Thumb user binaries"
- depends on CPU_ARM720T || CPU_ARM920T || CPU_ARM922T || CPU_ARM925T || CPU_ARM926T || CPU_ARM1020 || CPU_ARM1020E || CPU_ARM1022 || CPU_ARM1026 || CPU_XSCALE || CPU_XSC3 || CPU_V6
+ depends on CPU_ARM720T || CPU_ARM740T || CPU_ARM920T || CPU_ARM922T || CPU_ARM925T || CPU_ARM926T || CPU_ARM1020 || CPU_ARM1020E || CPU_ARM1022 || CPU_ARM1026 || CPU_XSCALE || CPU_XSC3 || CPU_V6
default y
help
Say Y if you want to include kernel support for running user space
@@ -473,7 +488,7 @@ config CPU_DCACHE_DISABLE
config CPU_DCACHE_WRITETHROUGH
bool "Force write through D-cache"
- depends on (CPU_ARM920T || CPU_ARM922T || CPU_ARM925T || CPU_ARM926T || CPU_ARM1020 || CPU_V6) && !CPU_DCACHE_DISABLE
+ depends on (CPU_ARM740T || CPU_ARM920T || CPU_ARM922T || CPU_ARM925T || CPU_ARM926T || CPU_ARM1020 || CPU_V6) && !CPU_DCACHE_DISABLE
default y if CPU_ARM925T
help
Say Y here to use the data cache in writethrough mode. Unless you