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| author | Linus Torvalds <torvalds@linux-foundation.org> | 2008-10-23 08:12:21 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2008-10-23 08:12:21 -0700 |
| commit | fdc76bf9b62446c9d4b00e0d355c3212b4f1b13b (patch) | |
| tree | d4266abf69b2ef462b147a33d4f905055781714b /arch/arm/mm/cache-v4.S | |
| parent | 72441bdc76f7f71d7b75cdaa48f26dbb1f3d932e (diff) | |
| parent | f6335c43f3d7816ba2e69abce4f29c41f65bb27e (diff) | |
Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm:
[ARM] clps711x: add sparsemem definitions
[ARM] 5315/1: Fix section mismatch warning (sa1111)
[ARM] Orion: activate workaround for 88f6183 SPI clock erratum
[ARM] Orion: instantiate the dsa switch driver
[ARM] mv78xx0: force link speed/duplex on eth2/eth3
[ARM] remove extra brace in arch/arm/mach-pxa/trizeps4.c
[ARM] balance parenthesis in header file
[ARM] pxa: fix trizeps PCMCIA build
[ARM] pxa: fix trizeps defconfig
[ARM] dmabounce requires ZONE_DMA
[ARM] 5303/1: period_cycles should be greater than 1
[ARM] 5310/1: Fix cache flush functions for ARMv4
[ARM] pxa: fix 3bca103a1e658d23737d20e1989139d9ca8973bf
[ARM] pxa: fix redefinition of NR_IRQS
[ARM] S3C24XX: Fix redefine of DEFINE_TIMER() in s3c24xx pwm-clock.c
[ARM] S3C2443: Fix HCLK rate
[ARM] S3C24XX: Serial driver debug depends on DEBUG_LL
[ARM] S3C24XX: pwm-clock set_parent mask fix
Diffstat (limited to 'arch/arm/mm/cache-v4.S')
| -rw-r--r-- | arch/arm/mm/cache-v4.S | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/mm/cache-v4.S b/arch/arm/mm/cache-v4.S index 33926c9fcda..5786adf1004 100644 --- a/arch/arm/mm/cache-v4.S +++ b/arch/arm/mm/cache-v4.S @@ -29,7 +29,7 @@ ENTRY(v4_flush_user_cache_all) * Clean and invalidate the entire cache. */ ENTRY(v4_flush_kern_cache_all) -#ifdef CPU_CP15 +#ifdef CONFIG_CPU_CP15 mov r0, #0 mcr p15, 0, r0, c7, c7, 0 @ flush ID cache mov pc, lr @@ -48,7 +48,7 @@ ENTRY(v4_flush_kern_cache_all) * - flags - vma_area_struct flags describing address space */ ENTRY(v4_flush_user_cache_range) -#ifdef CPU_CP15 +#ifdef CONFIG_CPU_CP15 mov ip, #0 mcreq p15, 0, ip, c7, c7, 0 @ flush ID cache mov pc, lr @@ -116,7 +116,7 @@ ENTRY(v4_dma_inv_range) * - end - virtual end address */ ENTRY(v4_dma_flush_range) -#ifdef CPU_CP15 +#ifdef CONFIG_CPU_CP15 mov r0, #0 mcr p15, 0, r0, c7, c7, 0 @ flush ID cache #endif |