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| author | Steven Whitehouse <steve@men-an-tol.chygwyn.com> | 2006-02-23 09:49:43 +0000 |
|---|---|---|
| committer | Steven Whitehouse <swhiteho@redhat.com> | 2006-02-23 09:49:43 +0000 |
| commit | d35462b4bb847b68321c55e95c926aa485aecce2 (patch) | |
| tree | b08e18bf6e672633402871ee763102fdb5e63229 /arch/arm/mm/cache-v6.S | |
| parent | 91ffd7db71e7451f89941a8f428b4daa2a7c1e38 (diff) | |
| parent | 9e956c2dac9bec602ed1ba29181b45ba6d2b6448 (diff) | |
Merge branch 'master'
Diffstat (limited to 'arch/arm/mm/cache-v6.S')
| -rw-r--r-- | arch/arm/mm/cache-v6.S | 18 |
1 files changed, 6 insertions, 12 deletions
diff --git a/arch/arm/mm/cache-v6.S b/arch/arm/mm/cache-v6.S index 72966d90e95..d921c1024ae 100644 --- a/arch/arm/mm/cache-v6.S +++ b/arch/arm/mm/cache-v6.S @@ -92,22 +92,16 @@ ENTRY(v6_coherent_kern_range) * - the Icache does not read data from the write buffer */ ENTRY(v6_coherent_user_range) - bic r0, r0, #CACHE_LINE_SIZE - 1 -1: + #ifdef HARVARD_CACHE - mcr p15, 0, r0, c7, c10, 1 @ clean D line + bic r0, r0, #CACHE_LINE_SIZE - 1 +1: mcr p15, 0, r0, c7, c10, 1 @ clean D line mcr p15, 0, r0, c7, c5, 1 @ invalidate I line -#endif - mcr p15, 0, r0, c7, c5, 7 @ invalidate BTB entry - add r0, r0, #BTB_FLUSH_SIZE - mcr p15, 0, r0, c7, c5, 7 @ invalidate BTB entry - add r0, r0, #BTB_FLUSH_SIZE - mcr p15, 0, r0, c7, c5, 7 @ invalidate BTB entry - add r0, r0, #BTB_FLUSH_SIZE - mcr p15, 0, r0, c7, c5, 7 @ invalidate BTB entry - add r0, r0, #BTB_FLUSH_SIZE + add r0, r0, #CACHE_LINE_SIZE cmp r0, r1 blo 1b +#endif + mcr p15, 0, r0, c7, c5, 6 @ invalidate BTB #ifdef HARVARD_CACHE mov r0, #0 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer |