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authorSimon Arlott <simon@fire.lp0.eu>2007-05-11 20:40:30 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2007-05-20 20:10:32 +0100
commit6cbdc8c5357276307a77deeada3f04626ff17da6 (patch)
treee0a4190d816fa4efb6ddb331b859bf0d5eb9c1a3 /arch/arm/plat-omap
parentfc432e1952a3899ce35e84b417e5d60f74cb901b (diff)
[ARM] spelling fixes
Spelling fixes in arch/arm/. Signed-off-by: Simon Arlott <simon@fire.lp0.eu> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/plat-omap')
-rw-r--r--arch/arm/plat-omap/common.c2
-rw-r--r--arch/arm/plat-omap/dma.c2
-rw-r--r--arch/arm/plat-omap/sram.c6
-rw-r--r--arch/arm/plat-omap/usb.c2
4 files changed, 6 insertions, 6 deletions
diff --git a/arch/arm/plat-omap/common.c b/arch/arm/plat-omap/common.c
index dd8708ad0a7..7987aa6e95f 100644
--- a/arch/arm/plat-omap/common.c
+++ b/arch/arm/plat-omap/common.c
@@ -73,7 +73,7 @@ static const void *get_config(u16 tag, size_t len, int skip, size_t *len_out)
}
if (info != NULL) {
/* Check the length as a lame attempt to check for
- * binary inconsistancy. */
+ * binary inconsistency. */
if (len != NO_LENGTH_CHECK) {
/* Word-align len */
if (len & 0x03)
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index 55a4d3be16b..88d5b6d9f95 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -1172,7 +1172,7 @@ static void set_b1_regs(void)
break;
default:
BUG();
- return; /* Supress warning about uninitialized vars */
+ return; /* Suppress warning about uninitialized vars */
}
if (omap_dma_in_1510_mode()) {
diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c
index bc46f33aede..1f23f0459e5 100644
--- a/arch/arm/plat-omap/sram.c
+++ b/arch/arm/plat-omap/sram.c
@@ -59,8 +59,8 @@ extern unsigned long omapfb_reserve_sram(unsigned long sram_pstart,
/*
* Depending on the target RAMFS firewall setup, the public usable amount of
- * SRAM varies. The default accessable size for all device types is 2k. A GP
- * device allows ARM11 but not other initators for full size. This
+ * SRAM varies. The default accessible size for all device types is 2k. A GP
+ * device allows ARM11 but not other initiators for full size. This
* functionality seems ok until some nice security API happens.
*/
static int is_sram_locked(void)
@@ -71,7 +71,7 @@ static int is_sram_locked(void)
type = __raw_readl(VA_CONTROL_STAT) & TYPE_MASK;
if (type == GP_DEVICE) {
- /* RAMFW: R/W access to all initators for all qualifier sets */
+ /* RAMFW: R/W access to all initiators for all qualifier sets */
if (cpu_is_omap242x()) {
__raw_writel(0xFF, VA_REQINFOPERM0); /* all q-vects */
__raw_writel(0xCFDE, VA_READPERM0); /* all i-read */
diff --git a/arch/arm/plat-omap/usb.c b/arch/arm/plat-omap/usb.c
index 25489aafb11..a5aedf964b8 100644
--- a/arch/arm/plat-omap/usb.c
+++ b/arch/arm/plat-omap/usb.c
@@ -177,7 +177,7 @@ static u32 __init omap_usb0_init(unsigned nwires, unsigned is_device)
/* NOTE: SPEED and SUSP aren't configured here. OTG hosts
* may be able to use I2C requests to set those bits along
- * with VBUS switching and overcurrent detction.
+ * with VBUS switching and overcurrent detection.
*/
if (cpu_class_is_omap1() && nwires != 6)