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authorPaul Walmsley <paul@pwsan.com>2009-06-19 19:08:29 -0600
committerpaul <paul@twilight.(none)>2009-06-19 19:09:32 -0600
commit7b7bcefa35d62fec64c3615a6bef7866f34c7cc9 (patch)
tree6cc4b64b104f7587af19f801ec4804e90fad12eb /arch/arm/plat-omap
parent3afec6332e1e7cf2d74e0bf08160a68f43a59073 (diff)
OMAP3 SDRC: set FIXEDDELAY when disabling SDRC DLL
Correspondence with the TI OMAP hardware team indicates that SDRC_DLLA_CTRL.FIXEDDELAY should be initialized to 0x0f. This number was apparently derived from process validation. This is only used when the SDRC DLL is unlocked (e.g., SDRC clock frequency less than 83MHz). Signed-off-by: Paul Walmsley <paul@pwsan.com>
Diffstat (limited to 'arch/arm/plat-omap')
0 files changed, 0 insertions, 0 deletions