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authorRussell King <rmk@dyn-67.arm.linux.org.uk>2007-09-01 21:12:50 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2007-10-12 21:14:43 +0100
commit08197f6e3b262f4fb8b164c818d5e54b46c14711 (patch)
treea41fd3f3141def6021eb797b62c15ccf2a3a3e3d /arch/arm
parent6c3a158316598bfb165b8c83b168fa413d5ae2d8 (diff)
[ARM] pxa: make pxa timer initialisation select clock rate at runtime
Rather than using the compile-time constant CLOCK_TICK_RATE, select the clock tick rate at run time. We organise the selection so that PXA3 automatically falls out with the right tick rate. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/mach-pxa/time.c16
1 files changed, 13 insertions, 3 deletions
diff --git a/arch/arm/mach-pxa/time.c b/arch/arm/mach-pxa/time.c
index 7916311547c..ec4286c7931 100644
--- a/arch/arm/mach-pxa/time.c
+++ b/arch/arm/mach-pxa/time.c
@@ -23,6 +23,7 @@
#include <asm/mach/irq.h>
#include <asm/mach/time.h>
#include <asm/arch/pxa-regs.h>
+#include <asm/mach-types.h>
/*
* This is PXA's sched_clock implementation. This has a resolution
@@ -186,20 +187,29 @@ static struct irqaction pxa_ost0_irq = {
static void __init pxa_timer_init(void)
{
+ unsigned long clock_tick_rate;
+
OIER = 0;
OSSR = OSSR_M0 | OSSR_M1 | OSSR_M2 | OSSR_M3;
- set_oscr2ns_scale(CLOCK_TICK_RATE);
+ if (cpu_is_pxa21x() || cpu_is_pxa25x())
+ clock_tick_rate = 3686400;
+ else if (machine_is_mainstone())
+ clock_tick_rate = 3249600;
+ else
+ clock_tick_rate = 3250000;
+
+ set_oscr2ns_scale(clock_tick_rate);
ckevt_pxa_osmr0.mult =
- div_sc(CLOCK_TICK_RATE, NSEC_PER_SEC, ckevt_pxa_osmr0.shift);
+ div_sc(clock_tick_rate, NSEC_PER_SEC, ckevt_pxa_osmr0.shift);
ckevt_pxa_osmr0.max_delta_ns =
clockevent_delta2ns(0x7fffffff, &ckevt_pxa_osmr0);
ckevt_pxa_osmr0.min_delta_ns =
clockevent_delta2ns(MIN_OSCR_DELTA, &ckevt_pxa_osmr0) + 1;
cksrc_pxa_oscr0.mult =
- clocksource_hz2mult(CLOCK_TICK_RATE, cksrc_pxa_oscr0.shift);
+ clocksource_hz2mult(clock_tick_rate, cksrc_pxa_oscr0.shift);
setup_irq(IRQ_OST0, &pxa_ost0_irq);