diff options
| author | Mike Frysinger <vapier@gentoo.org> | 2009-05-19 12:58:13 +0000 |
|---|---|---|
| committer | Mike Frysinger <vapier@gentoo.org> | 2009-06-12 06:11:25 -0400 |
| commit | f339f46b05cfe289024b15a0525c8b61f1426a88 (patch) | |
| tree | 7fb39770944b805bbb198ffb5b9f1146e64838c0 /arch/blackfin/include | |
| parent | c8f36dc3c11c3e9e879ded82cdf5d748d4ab2fb2 (diff) | |
Blackfin: fix detection of cached L2 SRAM
Make sure our bfin_addr_dcachable() function flags cached L2 SRAM properly
else memory easily goes unflushed when working with DMA.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Diffstat (limited to 'arch/blackfin/include')
| -rw-r--r-- | arch/blackfin/include/asm/cacheflush.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/blackfin/include/asm/cacheflush.h b/arch/blackfin/include/asm/cacheflush.h index d7726ab486f..94697f0f6f4 100644 --- a/arch/blackfin/include/asm/cacheflush.h +++ b/arch/blackfin/include/asm/cacheflush.h @@ -108,6 +108,11 @@ static inline int bfin_addr_dcachable(unsigned long addr) addr >= _ramend && addr < physical_mem_end) return 1; +#ifndef CONFIG_BFIN_L2_NOT_CACHED + if (addr >= L2_START && addr < L2_START + L2_LENGTH) + return 1; +#endif + return 0; } |