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authorLinus Torvalds <torvalds@linux-foundation.org>2008-05-19 16:33:29 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2008-05-19 16:33:29 -0700
commit754cdd4aba225b74dcc35cc384aeb0c42b505e8b (patch)
tree8647f635336748667d68e68940dec1fcf88d51dd /arch/blackfin/lib/outs.S
parentdb07b02304d0d70bf8273abc93d94e4c8d2f9cec (diff)
parent460ed2ea04da012e5575eb357a47a7f6407767de (diff)
Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cooloney/blackfin-2.6
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cooloney/blackfin-2.6: Blackfin SPORTS UART Driver: converting BFIN->BLACKFIN Blackfin serial driver: add extra IRQ flag for 8250 serial driver 8250 Serial Driver: Added support for 8250-class UARTs in HV Sistemas H8606 board Blackfin arch: Fix bug - USB fails to build for BF524/BF526 Blackfin arch: update boards defconfig files Blackfin arch: IO Port functions to read/write unalligned memory Blackfin arch: enable a choice to provide 4M DMA memory Blackfin arch: cleanup the icplb/dcplb multiple hit checks Blackfin arch: Add workaround to read edge triggered GPIOs Blackfin arch: Sync channel defines with struct dma_register dma_io_base_addr. Blackfin arch: Check for Anomaly 05000182 [Blackfin] arch: rename bf5xx-flash to bfin-async-flash [Blackfin] arch: Blackfin checksum annotations
Diffstat (limited to 'arch/blackfin/lib/outs.S')
-rw-r--r--arch/blackfin/lib/outs.S16
1 files changed, 15 insertions, 1 deletions
diff --git a/arch/blackfin/lib/outs.S b/arch/blackfin/lib/outs.S
index 4c3da8ae094..3daf96035bf 100644
--- a/arch/blackfin/lib/outs.S
+++ b/arch/blackfin/lib/outs.S
@@ -7,7 +7,7 @@
* Description: Implementation of outs{bwl} for BlackFin processors using zero overhead loops.
*
* Modified: Copyright (C) 2005 Bas Vermeulen, BuyWays BV <bas@buyways.nl>
- * Copyright 2004-2006 Analog Devices Inc.
+ * Copyright 2004-2008 Analog Devices Inc.
*
* Bugs: Enter bugs at http://blackfin.uclinux.org/
*
@@ -63,3 +63,17 @@ ENTRY(_outsb)
.Lbyte_loop_e: B[P0] = R0;
RTS;
ENDPROC(_outsb)
+
+ENTRY(_outsw_8)
+ P0 = R0; /* P0 = port */
+ P1 = R1; /* P1 = address */
+ P2 = R2; /* P2 = count */
+
+ LSETUP( .Lword8_loop_s, .Lword8_loop_e) LC0 = P2;
+.Lword8_loop_s: R1 = B[P1++];
+ R0 = B[P1++];
+ R0 = R0 << 8;
+ R0 = R0 + R1;
+.Lword8_loop_e: W[P0] = R0;
+ RTS;
+ENDPROC(_outsw)