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authorYi Li <yi.li@analog.com>2009-01-07 23:14:39 +0800
committerBryan Wu <cooloney@kernel.org>2009-01-07 23:14:39 +0800
commit6a01f230339321292cf065551f8cf55361052461 (patch)
tree7ac2ac8fc9f05a7315ef6a7f6f0a387433c62c14 /arch/blackfin/mach-bf548/include/mach
parent5105432a3201e3f0e6c219cd0a74feee1e5e262b (diff)
Blackfin arch: merge adeos blackfin part to arch/blackfin/
[Mike Frysinger <vapier.adi@gmail.com>: - handle bf531/bf532/bf534/bf536 variants in ipipe.h - cleanup IPIPE logic for bfin_set_irq_handler() - cleanup ipipe asm code a bit and add missing ENDPROC() - simplify IPIPE code in trap_c - unify some of the IPIPE code and fix style - simplify DO_IRQ_L1 handling with ipipe code - revert IRQ_SW_INT# addition from ipipe merge - remove duplicate get_{c,s}clk() prototypes ] Signed-off-by: Yi Li <yi.li@analog.com> Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
Diffstat (limited to 'arch/blackfin/mach-bf548/include/mach')
-rw-r--r--arch/blackfin/mach-bf548/include/mach/cdefBF54x_base.h8
-rw-r--r--arch/blackfin/mach-bf548/include/mach/irq.h2
2 files changed, 5 insertions, 5 deletions
diff --git a/arch/blackfin/mach-bf548/include/mach/cdefBF54x_base.h b/arch/blackfin/mach-bf548/include/mach/cdefBF54x_base.h
index 0a3b210daad..6e636c418cb 100644
--- a/arch/blackfin/mach-bf548/include/mach/cdefBF54x_base.h
+++ b/arch/blackfin/mach-bf548/include/mach/cdefBF54x_base.h
@@ -2702,7 +2702,7 @@ static __inline__ void bfin_write_PLL_CTL(unsigned int val)
if (val == bfin_read_PLL_CTL())
return;
- local_irq_save(flags);
+ local_irq_save_hw(flags);
/* Enable the PLL Wakeup bit in SIC IWR */
iwr0 = bfin_read32(SIC_IWR0);
iwr1 = bfin_read32(SIC_IWR1);
@@ -2719,7 +2719,7 @@ static __inline__ void bfin_write_PLL_CTL(unsigned int val)
bfin_write32(SIC_IWR0, iwr0);
bfin_write32(SIC_IWR1, iwr1);
bfin_write32(SIC_IWR2, iwr2);
- local_irq_restore(flags);
+ local_irq_restore_hw(flags);
}
/* Writing to VR_CTL initiates a PLL relock sequence. */
@@ -2730,7 +2730,7 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
if (val == bfin_read_VR_CTL())
return;
- local_irq_save(flags);
+ local_irq_save_hw(flags);
/* Enable the PLL Wakeup bit in SIC IWR */
iwr0 = bfin_read32(SIC_IWR0);
iwr1 = bfin_read32(SIC_IWR1);
@@ -2747,7 +2747,7 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
bfin_write32(SIC_IWR0, iwr0);
bfin_write32(SIC_IWR1, iwr1);
bfin_write32(SIC_IWR2, iwr2);
- local_irq_restore(flags);
+ local_irq_restore_hw(flags);
}
#endif /* _CDEF_BF54X_H */
diff --git a/arch/blackfin/mach-bf548/include/mach/irq.h b/arch/blackfin/mach-bf548/include/mach/irq.h
index ad380d1f587..60299a71e09 100644
--- a/arch/blackfin/mach-bf548/include/mach/irq.h
+++ b/arch/blackfin/mach-bf548/include/mach/irq.h
@@ -158,7 +158,7 @@ Events (highest priority) EMU 0
#define IRQ_PINT2 BFIN_IRQ(94) /* PINT2 Interrupt */
#define IRQ_PINT3 BFIN_IRQ(95) /* PINT3 Interrupt */
-#define SYS_IRQS IRQ_PINT3
+#define SYS_IRQS IRQ_PINT3
#define BFIN_PA_IRQ(x) ((x) + SYS_IRQS + 1)
#define IRQ_PA0 BFIN_PA_IRQ(0)