diff options
author | Russell King <rmk+kernel@arm.linux.org.uk> | 2009-09-22 20:54:53 +0100 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2009-09-22 21:01:40 +0100 |
commit | ae19ffbadc1b2100285a5b5b3d0a4e0a11390904 (patch) | |
tree | 3c2086ab67398a019089a47ca3f362a4bc6db74f /arch/blackfin/mm/isram-driver.c | |
parent | 34e84f39a27d059a3e6ec6e8b94aafa702e6f220 (diff) | |
parent | 9173a8ef24a6b1b8031507b35b8ffe5f85a87692 (diff) |
Merge branch 'master' into for-linus
Diffstat (limited to 'arch/blackfin/mm/isram-driver.c')
-rw-r--r-- | arch/blackfin/mm/isram-driver.c | 222 |
1 files changed, 216 insertions, 6 deletions
diff --git a/arch/blackfin/mm/isram-driver.c b/arch/blackfin/mm/isram-driver.c index c080e70f98b..beb1a608824 100644 --- a/arch/blackfin/mm/isram-driver.c +++ b/arch/blackfin/mm/isram-driver.c @@ -16,6 +16,8 @@ * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ +#define pr_fmt(fmt) "isram: " fmt + #include <linux/module.h> #include <linux/kernel.h> #include <linux/types.h> @@ -23,6 +25,7 @@ #include <linux/sched.h> #include <asm/blackfin.h> +#include <asm/dma.h> /* * IMPORTANT WARNING ABOUT THESE FUNCTIONS @@ -50,10 +53,12 @@ static DEFINE_SPINLOCK(dtest_lock); #define IADDR2DTEST(x) \ ({ unsigned long __addr = (unsigned long)(x); \ (__addr & 0x47F8) | /* address bits 14 & 10:3 */ \ + (__addr & 0x8000) << 23 | /* Bank A/B */ \ (__addr & 0x0800) << 15 | /* address bit 11 */ \ - (__addr & 0x3000) << 4 | /* address bits 13:12 */ \ - (__addr & 0x8000) << 8 | /* address bit 15 */ \ - (0x1000004); /* isram access */ \ + (__addr & 0x3000) << 4 | /* address bits 13:12 */ \ + (__addr & 0x8000) << 8 | /* address bit 15 */ \ + (0x1000000) | /* instruction access = 1 */ \ + (0x4); /* data array = 1 */ \ }) /* Takes a pointer, and returns the offset (in bits) which things should be shifted */ @@ -70,7 +75,7 @@ static void isram_write(const void *addr, uint64_t data) if (addr >= (void *)(L1_CODE_START + L1_CODE_LENGTH)) return; - cmd = IADDR2DTEST(addr) | 1; /* write */ + cmd = IADDR2DTEST(addr) | 2; /* write */ /* * Writes to DTEST_DATA[0:1] need to be atomic with write to DTEST_COMMAND @@ -127,8 +132,7 @@ static bool isram_check_addr(const void *addr, size_t n) (addr < (void *)(L1_CODE_START + L1_CODE_LENGTH))) { if ((addr + n) > (void *)(L1_CODE_START + L1_CODE_LENGTH)) { show_stack(NULL, NULL); - printk(KERN_ERR "isram_memcpy: copy involving %p length " - "(%zu) too long\n", addr, n); + pr_err("copy involving %p length (%zu) too long\n", addr, n); } return true; } @@ -199,3 +203,209 @@ void *isram_memcpy(void *dest, const void *src, size_t n) } EXPORT_SYMBOL(isram_memcpy); +#ifdef CONFIG_BFIN_ISRAM_SELF_TEST + +#define TEST_LEN 0x100 + +static __init void hex_dump(unsigned char *buf, int len) +{ + while (len--) + pr_cont("%02x", *buf++); +} + +static __init int isram_read_test(char *sdram, void *l1inst) +{ + int i, ret = 0; + uint64_t data1, data2; + + pr_info("INFO: running isram_read tests\n"); + + /* setup some different data to play with */ + for (i = 0; i < TEST_LEN; ++i) + sdram[i] = i; + dma_memcpy(l1inst, sdram, TEST_LEN); + + /* make sure we can read the L1 inst */ + for (i = 0; i < TEST_LEN; i += sizeof(uint64_t)) { + data1 = isram_read(l1inst + i); + memcpy(&data2, sdram + i, sizeof(data2)); + if (memcmp(&data1, &data2, sizeof(uint64_t))) { + pr_err("FAIL: isram_read(%p) returned %#llx but wanted %#llx\n", + l1inst + i, data1, data2); + ++ret; + } + } + + return ret; +} + +static __init int isram_write_test(char *sdram, void *l1inst) +{ + int i, ret = 0; + uint64_t data1, data2; + + pr_info("INFO: running isram_write tests\n"); + + /* setup some different data to play with */ + memset(sdram, 0, TEST_LEN * 2); + dma_memcpy(l1inst, sdram, TEST_LEN); + for (i = 0; i < TEST_LEN; ++i) + sdram[i] = i; + + /* make sure we can write the L1 inst */ + for (i = 0; i < TEST_LEN; i += sizeof(uint64_t)) { + memcpy(&data1, sdram + i, sizeof(data1)); + isram_write(l1inst + i, data1); + data2 = isram_read(l1inst + i); + if (memcmp(&data1, &data2, sizeof(uint64_t))) { + pr_err("FAIL: isram_write(%p, %#llx) != %#llx\n", + l1inst + i, data1, data2); + ++ret; + } + } + + dma_memcpy(sdram + TEST_LEN, l1inst, TEST_LEN); + if (memcmp(sdram, sdram + TEST_LEN, TEST_LEN)) { + pr_err("FAIL: isram_write() did not work properly\n"); + ++ret; + } + + return ret; +} + +static __init int +_isram_memcpy_test(char pattern, void *sdram, void *l1inst, const char *smemcpy, + void *(*fmemcpy)(void *, const void *, size_t)) +{ + memset(sdram, pattern, TEST_LEN); + fmemcpy(l1inst, sdram, TEST_LEN); + fmemcpy(sdram + TEST_LEN, l1inst, TEST_LEN); + if (memcmp(sdram, sdram + TEST_LEN, TEST_LEN)) { + pr_err("FAIL: %s(%p <=> %p, %#x) failed (data is %#x)\n", + smemcpy, l1inst, sdram, TEST_LEN, pattern); + return 1; + } + return 0; +} +#define _isram_memcpy_test(a, b, c, d) _isram_memcpy_test(a, b, c, #d, d) + +static __init int isram_memcpy_test(char *sdram, void *l1inst) +{ + int i, j, thisret, ret = 0; + + /* check broad isram_memcpy() */ + pr_info("INFO: running broad isram_memcpy tests\n"); + for (i = 0xf; i >= 0; --i) + ret += _isram_memcpy_test(i, sdram, l1inst, isram_memcpy); + + /* check read of small, unaligned, and hardware 64bit limits */ + pr_info("INFO: running isram_memcpy (read) tests\n"); + + for (i = 0; i < TEST_LEN; ++i) + sdram[i] = i; + dma_memcpy(l1inst, sdram, TEST_LEN); + + thisret = 0; + for (i = 0; i < TEST_LEN - 32; ++i) { + unsigned char cmp[32]; + for (j = 1; j <= 32; ++j) { + memset(cmp, 0, sizeof(cmp)); + isram_memcpy(cmp, l1inst + i, j); + if (memcmp(cmp, sdram + i, j)) { + pr_err("FAIL: %p:", l1inst + 1); + hex_dump(cmp, j); + pr_cont(" SDRAM:"); + hex_dump(sdram + i, j); + pr_cont("\n"); + if (++thisret > 20) { + pr_err("FAIL: skipping remaining series\n"); + i = TEST_LEN; + break; + } + } + } + } + ret += thisret; + + /* check write of small, unaligned, and hardware 64bit limits */ + pr_info("INFO: running isram_memcpy (write) tests\n"); + + memset(sdram + TEST_LEN, 0, TEST_LEN); + dma_memcpy(l1inst, sdram + TEST_LEN, TEST_LEN); + + thisret = 0; + for (i = 0; i < TEST_LEN - 32; ++i) { + unsigned char cmp[32]; + for (j = 1; j <= 32; ++j) { + isram_memcpy(l1inst + i, sdram + i, j); + dma_memcpy(cmp, l1inst + i, j); + if (memcmp(cmp, sdram + i, j)) { + pr_err("FAIL: %p:", l1inst + i); + hex_dump(cmp, j); + pr_cont(" SDRAM:"); + hex_dump(sdram + i, j); + pr_cont("\n"); + if (++thisret > 20) { + pr_err("FAIL: skipping remaining series\n"); + i = TEST_LEN; + break; + } + } + } + } + ret += thisret; + + return ret; +} + +static __init int isram_test_init(void) +{ + int ret; + char *sdram; + void *l1inst; + + sdram = kmalloc(TEST_LEN * 2, GFP_KERNEL); + if (!sdram) { + pr_warning("SKIP: could not allocate sdram\n"); + return 0; + } + + l1inst = l1_inst_sram_alloc(TEST_LEN); + if (!l1inst) { + kfree(sdram); + pr_warning("SKIP: could not allocate L1 inst\n"); + return 0; + } + + /* sanity check initial L1 inst state */ + ret = 1; + pr_info("INFO: running initial dma_memcpy checks\n"); + if (_isram_memcpy_test(0xa, sdram, l1inst, dma_memcpy)) + goto abort; + if (_isram_memcpy_test(0x5, sdram, l1inst, dma_memcpy)) + goto abort; + + ret = 0; + ret += isram_read_test(sdram, l1inst); + ret += isram_write_test(sdram, l1inst); + ret += isram_memcpy_test(sdram, l1inst); + + abort: + sram_free(l1inst); + kfree(sdram); + + if (ret) + return -EIO; + + pr_info("PASS: all tests worked !\n"); + return 0; +} +late_initcall(isram_test_init); + +static __exit void isram_test_exit(void) +{ + /* stub to allow unloading */ +} +module_exit(isram_test_exit); + +#endif |