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| author | Steve French <sfrench@hera.kernel.org> | 2005-05-31 14:32:44 -0700 |
|---|---|---|
| committer | Steve French <sfrench@hera.kernel.org> | 2005-05-31 14:32:44 -0700 |
| commit | af6f5e3247a68074e384ef93c0b4bce1b73c9d80 (patch) | |
| tree | 87b0f1e48bd0ca67a78fab0fa42b37864863fdfd /arch/ia64/kernel/minstate.h | |
| parent | 7e2987503dda95a5f80290bb8c06279009c2419e (diff) | |
| parent | 2e3e80c2b75e3815a0160cbd23d4fdb767d66b35 (diff) | |
Merge with rsync://rsync.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6.git
Diffstat (limited to 'arch/ia64/kernel/minstate.h')
| -rw-r--r-- | arch/ia64/kernel/minstate.h | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/arch/ia64/kernel/minstate.h b/arch/ia64/kernel/minstate.h index 1dbc7b2497c..f6d8a010d99 100644 --- a/arch/ia64/kernel/minstate.h +++ b/arch/ia64/kernel/minstate.h @@ -41,7 +41,7 @@ (pKStk) addl r3=THIS_CPU(ia64_mca_data),r3;; \ (pKStk) ld8 r3 = [r3];; \ (pKStk) addl r3=IA64_MCA_CPU_INIT_STACK_OFFSET,r3;; \ -(pKStk) addl sp=IA64_STK_OFFSET-IA64_PT_REGS_SIZE,r3; \ +(pKStk) addl r1=IA64_STK_OFFSET-IA64_PT_REGS_SIZE,r3; \ (pUStk) mov ar.rsc=0; /* set enforced lazy mode, pl 0, little-endian, loadrs=0 */ \ (pUStk) addl r22=IA64_RBS_OFFSET,r1; /* compute base of register backing store */ \ ;; \ @@ -50,7 +50,6 @@ (pUStk) mov r23=ar.bspstore; /* save ar.bspstore */ \ (pUStk) dep r22=-1,r22,61,3; /* compute kernel virtual addr of RBS */ \ ;; \ -(pKStk) addl r1=-IA64_PT_REGS_SIZE,r1; /* if in kernel mode, use sp (r12) */ \ (pUStk) mov ar.bspstore=r22; /* switch to kernel RBS */ \ ;; \ (pUStk) mov r18=ar.bsp; \ |