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authorJohn Keller <jpk@sgi.com>2007-08-22 19:32:06 -0500
committerTony Luck <tony.luck@intel.com>2007-09-01 02:49:57 -0700
commit6e9de18120988388cdae5097c09e774416d58745 (patch)
tree04f7de7bee8d38a4e871970afda136bb5ac853be /arch/ia64/sn/pci/pcibr
parent1aac0b5739ae192ee812eee09625ebfc08c2d760 (diff)
[IA64] SN: Add support for CPU disable
Add additional support for CPU disable on SN platforms. Correctly setup the smp_affinity mask for I/O error IRQs. Restrict the use of the feature to Altix 4000 and 450 systems running with a CPU disable capable PROM, and do not allow disabling of CPU 0. Signed-off-by: John Keller <jpk@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
Diffstat (limited to 'arch/ia64/sn/pci/pcibr')
-rw-r--r--arch/ia64/sn/pci/pcibr/pcibr_provider.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/ia64/sn/pci/pcibr/pcibr_provider.c b/arch/ia64/sn/pci/pcibr/pcibr_provider.c
index 42485ad50ce..ab3eaf85fe4 100644
--- a/arch/ia64/sn/pci/pcibr/pcibr_provider.c
+++ b/arch/ia64/sn/pci/pcibr/pcibr_provider.c
@@ -145,6 +145,7 @@ pcibr_bus_fixup(struct pcibus_bussoft *prom_bussoft, struct pci_controller *cont
printk(KERN_WARNING
"pcibr cannot allocate interrupt for error handler\n");
}
+ sn_set_err_irq_affinity(SGI_PCIASIC_ERROR);
/*
* Update the Bridge with the "kernel" pagesize