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authorGreg Ungerer <gerg@uclinux.org>2009-04-28 14:13:21 +1000
committerGreg Ungerer <gerg@uclinux.org>2009-06-11 13:09:08 +1000
commit7f72b47cedd1efc301576ff1050ec0a26c57eb48 (patch)
tree0bdf8eea894a34430b91291b18657290d1b79353 /arch/m68k/include/asm
parent769f3e8c384795cc350e2aae27de2a12374d19d4 (diff)
m68knommu: fix system reset for ColdFire 527x family
The sofwtare reset control for the 527x ColdFire family is based on the same Reset Control Unit as the 528x ColdFire family. So use the same reset code for both. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Diffstat (limited to 'arch/m68k/include/asm')
-rw-r--r--arch/m68k/include/asm/system_no.h16
1 files changed, 8 insertions, 8 deletions
diff --git a/arch/m68k/include/asm/system_no.h b/arch/m68k/include/asm/system_no.h
index 4496c0aa837..5fbc96d933c 100644
--- a/arch/m68k/include/asm/system_no.h
+++ b/arch/m68k/include/asm/system_no.h
@@ -264,18 +264,18 @@ static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int siz
: /* No output */ \
: "o" (*(char *)MCF_MBAR) ); \
})
-#elif defined(CONFIG_M528x)
+#elif defined(CONFIG_M528x) || defined(CONFIG_M527x)
/*
- * The MCF528x has a bit (SOFTRST) in memory (Reset Control Register RCR),
- * that when set, resets the MCF528x.
+ * Most of the newer ColdFire family members have a proper RESET unit.
+ * Use the software reset control bit in the Reset Control Register (RCR).
*/
#define HARD_RESET_NOW() \
-({ \
- unsigned char volatile *reset; \
- asm("move.w #0x2700, %sr"); \
+({ \
+ unsigned char volatile *reset; \
+ asm("move.w #0x2700, %sr"); \
reset = ((volatile unsigned char *)(MCF_IPSBAR + 0x110000)); \
- while(1) \
- *reset |= (0x01 << 7);\
+ while (1) \
+ *reset |= (0x01 << 7); \
})
#elif defined(CONFIG_M523x)
#define HARD_RESET_NOW() ({ \