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authorMatt Waddel <Matt.Waddel@freescale.com>2008-12-20 07:16:38 -0700
committerGreg Ungerer <gerg@uclinux.org>2009-01-27 16:42:03 +1000
commitadd8240eedb586b9d885c324db7f98fc1a470f9f (patch)
treed29913cdf206040fd4e1ef9f542c2e01bb1baf1d /arch/m68knommu/platform/532x/config.c
parent05ae6fa31874eda2484da13c5dc4ddee8a47a0a4 (diff)
m68knommu: fix 5329 ColdFire periphal addressing
The 5329 ColdFire peripheral IO register addresses are not relative to the MBAR register. So fix the serial platform setup array and IRQ acking to use just the direct addresses. Signed-off-by: Matt Waddel <Matt.Waddel@freescale.com> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Diffstat (limited to 'arch/m68knommu/platform/532x/config.c')
-rw-r--r--arch/m68knommu/platform/532x/config.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/m68knommu/platform/532x/config.c b/arch/m68knommu/platform/532x/config.c
index 4f44b632045..a347623d6ee 100644
--- a/arch/m68knommu/platform/532x/config.c
+++ b/arch/m68knommu/platform/532x/config.c
@@ -41,15 +41,15 @@ extern unsigned int mcf_timerlevel;
static struct mcf_platform_uart m532x_uart_platform[] = {
{
- .mapbase = MCF_MBAR + MCFUART_BASE1,
+ .mapbase = MCFUART_BASE1,
.irq = MCFINT_VECBASE + MCFINT_UART0,
},
{
- .mapbase = MCF_MBAR + MCFUART_BASE2,
+ .mapbase = MCFUART_BASE2,
.irq = MCFINT_VECBASE + MCFINT_UART1,
},
{
- .mapbase = MCF_MBAR + MCFUART_BASE3,
+ .mapbase = MCFUART_BASE3,
.irq = MCFINT_VECBASE + MCFINT_UART2,
},
{ },
@@ -108,7 +108,7 @@ void mcf_settimericr(unsigned int timer, unsigned int level)
default: irq = 32; icr = MCFSIM_ICR_TIMER1; break;
}
- icrp = (volatile unsigned char *) (MCF_MBAR + icr);
+ icrp = (volatile unsigned char *) (icr);
*icrp = level;
mcf_enable_irq0(irq);
}