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authorWu Zhangjin <wuzhangjin@gmail.com>2009-11-06 18:45:05 +0800
committerRalf Baechle <ralf@linux-mips.org>2009-12-17 01:57:10 +0000
commit6f7a251a259e5bf58a9ff334bdcfa3e42b6cb7a3 (patch)
treef5b65babda54c52073819629cc0f1047b5d1b413 /arch/mips/Makefile
parent937893cf5be53203eabc6f4db29f86b1fdeea203 (diff)
MIPS: Loongson: Add basic Loongson 2F support
Loongson 2F has built-in DDR2 and PCI-X controller. The PCI-X controller has a programming interface similiar to the the FPGA northbridge used on Loongson 2E. The main differences between Loongson 2E and Loongson 2F include: 1. Loongson 2F has an extra address window configuration module, which is used to map CPU address space to DDR or PCI address space, or map the PCI-DMA address space to DDR or LIO address space. 2. Loongson 2F supports 8 levels of software configurable CPu frequency which can be configured in the LOONGSON_CHIPCFG0 register. The coming cpufreq and standby support are based on this feature. Loongson.h abstracts the modules and corresponding methods are abstracted. Add other Loongson-2F-specific source code including gcc 4.4 support, PCI memory space, PCI IO space, DMA address. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/Makefile')
-rw-r--r--arch/mips/Makefile2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/mips/Makefile b/arch/mips/Makefile
index ba04782c4b9..47ecded2090 100644
--- a/arch/mips/Makefile
+++ b/arch/mips/Makefile
@@ -125,6 +125,8 @@ cflags-$(CONFIG_CPU_TX49XX) += -march=r4600 -Wa,--trap
cflags-$(CONFIG_CPU_LOONGSON2) += -Wa,--trap
cflags-$(CONFIG_CPU_LOONGSON2E) += \
$(call cc-option,-march=loongson2e,-march=r4600)
+cflags-$(CONFIG_CPU_LOONGSON2F) += \
+ $(call cc-option,-march=loongson2f,-march=r4600)
cflags-$(CONFIG_CPU_MIPS32_R1) += $(call cc-option,-march=mips32,-mips32 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS32) \
-Wa,-mips32 -Wa,--trap