diff options
| author | Atsushi Nemoto <anemo@mba.ocn.ne.jp> | 2008-08-19 22:55:09 +0900 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2008-10-11 16:18:42 +0100 |
| commit | d10e025f0e4ba4b96d7b5786d232ac5b0b232b11 (patch) | |
| tree | a417a55071b4b7edc22b7c5bb1a2352e7b5986d9 /arch/mips/cobalt/lcd.c | |
| parent | 860e546c19d88c21819c7f0861c505debd2d6eed (diff) | |
MIPS: TXx9: Cache fixup
TX39/TX49 can enable/disable I/D cache at runtime. Add kernel options
to control them. This is useful to debug some cache-related issues,
such as aliasing or I/D coherency. Also enable CWF bit for TX49 SoCs.
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/cobalt/lcd.c')
0 files changed, 0 insertions, 0 deletions