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authorLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 15:20:36 -0700
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 15:20:36 -0700
commit1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch)
tree0bba044c4ce775e45a88a51686b5d9f90697ea9d /arch/mips/ddb5xxx/common
Linux-2.6.12-rc2
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
Diffstat (limited to 'arch/mips/ddb5xxx/common')
-rw-r--r--arch/mips/ddb5xxx/common/Makefile5
-rw-r--r--arch/mips/ddb5xxx/common/nile4.c130
-rw-r--r--arch/mips/ddb5xxx/common/prom.c142
-rw-r--r--arch/mips/ddb5xxx/common/rtc_ds1386.c164
4 files changed, 441 insertions, 0 deletions
diff --git a/arch/mips/ddb5xxx/common/Makefile b/arch/mips/ddb5xxx/common/Makefile
new file mode 100644
index 00000000000..bc44e303271
--- /dev/null
+++ b/arch/mips/ddb5xxx/common/Makefile
@@ -0,0 +1,5 @@
+#
+# Makefile for the common code of NEC DDB-Vrc5xxx board
+#
+
+obj-y += nile4.o prom.o rtc_ds1386.o
diff --git a/arch/mips/ddb5xxx/common/nile4.c b/arch/mips/ddb5xxx/common/nile4.c
new file mode 100644
index 00000000000..7ec7d903ba9
--- /dev/null
+++ b/arch/mips/ddb5xxx/common/nile4.c
@@ -0,0 +1,130 @@
+/*
+ *
+ * Copyright 2001 MontaVista Software Inc.
+ * Author: jsun@mvista.com or jsun@junsun.net
+ *
+ * arch/mips/ddb5xxx/common/nile4.c
+ * misc low-level routines for vrc-5xxx controllers.
+ *
+ * derived from original code by Geert Uytterhoeven <geert@sonycom.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+#include <linux/types.h>
+#include <linux/kernel.h>
+
+#include <asm/ddb5xxx/ddb5xxx.h>
+
+u32
+ddb_calc_pdar(u32 phys, u32 size, int width,
+ int on_memory_bus, int pci_visible)
+{
+ u32 maskbits;
+ u32 widthbits;
+
+ switch (size) {
+#if 0 /* We don't support 4 GB yet */
+ case 0x100000000: /* 4 GB */
+ maskbits = 4;
+ break;
+#endif
+ case 0x80000000: /* 2 GB */
+ maskbits = 5;
+ break;
+ case 0x40000000: /* 1 GB */
+ maskbits = 6;
+ break;
+ case 0x20000000: /* 512 MB */
+ maskbits = 7;
+ break;
+ case 0x10000000: /* 256 MB */
+ maskbits = 8;
+ break;
+ case 0x08000000: /* 128 MB */
+ maskbits = 9;
+ break;
+ case 0x04000000: /* 64 MB */
+ maskbits = 10;
+ break;
+ case 0x02000000: /* 32 MB */
+ maskbits = 11;
+ break;
+ case 0x01000000: /* 16 MB */
+ maskbits = 12;
+ break;
+ case 0x00800000: /* 8 MB */
+ maskbits = 13;
+ break;
+ case 0x00400000: /* 4 MB */
+ maskbits = 14;
+ break;
+ case 0x00200000: /* 2 MB */
+ maskbits = 15;
+ break;
+ case 0: /* OFF */
+ maskbits = 0;
+ break;
+ default:
+ panic("nile4_set_pdar: unsupported size %p", (void *) size);
+ }
+ switch (width) {
+ case 8:
+ widthbits = 0;
+ break;
+ case 16:
+ widthbits = 1;
+ break;
+ case 32:
+ widthbits = 2;
+ break;
+ case 64:
+ widthbits = 3;
+ break;
+ default:
+ panic("nile4_set_pdar: unsupported width %d", width);
+ }
+
+ return maskbits | (on_memory_bus ? 0x10 : 0) |
+ (pci_visible ? 0x20 : 0) | (widthbits << 6) |
+ (phys & 0xffe00000);
+}
+
+void
+ddb_set_pdar(u32 pdar, u32 phys, u32 size, int width,
+ int on_memory_bus, int pci_visible)
+{
+ u32 temp= ddb_calc_pdar(phys, size, width, on_memory_bus, pci_visible);
+ ddb_out32(pdar, temp);
+ ddb_out32(pdar + 4, 0);
+
+ /*
+ * When programming a PDAR, the register should be read immediately
+ * after writing it. This ensures that address decoders are properly
+ * configured.
+ * [jsun] is this really necessary?
+ */
+ ddb_in32(pdar);
+ ddb_in32(pdar + 4);
+}
+
+/*
+ * routines that mess with PCIINITx registers
+ */
+
+void ddb_set_pmr(u32 pmr, u32 type, u32 addr, u32 options)
+{
+ switch (type) {
+ case DDB_PCICMD_IACK: /* PCI Interrupt Acknowledge */
+ case DDB_PCICMD_IO: /* PCI I/O Space */
+ case DDB_PCICMD_MEM: /* PCI Memory Space */
+ case DDB_PCICMD_CFG: /* PCI Configuration Space */
+ break;
+ default:
+ panic("nile4_set_pmr: invalid type %d", type);
+ }
+ ddb_out32(pmr, (type << 1) | (addr & 0xffe00000) | options );
+ ddb_out32(pmr + 4, 0);
+}
diff --git a/arch/mips/ddb5xxx/common/prom.c b/arch/mips/ddb5xxx/common/prom.c
new file mode 100644
index 00000000000..b8d1f7489f3
--- /dev/null
+++ b/arch/mips/ddb5xxx/common/prom.c
@@ -0,0 +1,142 @@
+/*
+ * Copyright 2001 MontaVista Software Inc.
+ * Author: jsun@mvista.com or jsun@junsun.net
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/mm.h>
+#include <linux/sched.h>
+#include <linux/bootmem.h>
+
+#include <asm/addrspace.h>
+#include <asm/bootinfo.h>
+#include <asm/ddb5xxx/ddb5xxx.h>
+#include <asm/debug.h>
+
+const char *get_system_type(void)
+{
+ switch (mips_machtype) {
+ case MACH_NEC_DDB5074: return "NEC DDB Vrc-5074";
+ case MACH_NEC_DDB5476: return "NEC DDB Vrc-5476";
+ case MACH_NEC_DDB5477: return "NEC DDB Vrc-5477";
+ case MACH_NEC_ROCKHOPPER: return "NEC Rockhopper";
+ case MACH_NEC_ROCKHOPPERII: return "NEC RockhopperII";
+ default: return "Unknown NEC board";
+ }
+}
+
+#if defined(CONFIG_DDB5477)
+void ddb5477_runtime_detection(void);
+#endif
+
+/* [jsun@junsun.net] PMON passes arguments in C main() style */
+void __init prom_init(void)
+{
+ int argc = fw_arg0;
+ char **arg = (char**) fw_arg1;
+ int i;
+
+ /* if user passes kernel args, ignore the default one */
+ if (argc > 1)
+ arcs_cmdline[0] = '\0';
+
+ /* arg[0] is "g", the rest is boot parameters */
+ for (i = 1; i < argc; i++) {
+ if (strlen(arcs_cmdline) + strlen(arg[i] + 1)
+ >= sizeof(arcs_cmdline))
+ break;
+ strcat(arcs_cmdline, arg[i]);
+ strcat(arcs_cmdline, " ");
+ }
+
+ mips_machgroup = MACH_GROUP_NEC_DDB;
+
+#if defined(CONFIG_DDB5074)
+ mips_machtype = MACH_NEC_DDB5074;
+ add_memory_region(0, DDB_SDRAM_SIZE, BOOT_MEM_RAM);
+#elif defined(CONFIG_DDB5476)
+ mips_machtype = MACH_NEC_DDB5476;
+ add_memory_region(0, DDB_SDRAM_SIZE, BOOT_MEM_RAM);
+#elif defined(CONFIG_DDB5477)
+ ddb5477_runtime_detection();
+ add_memory_region(0, board_ram_size, BOOT_MEM_RAM);
+#endif
+}
+
+unsigned long __init prom_free_prom_memory(void)
+{
+ return 0;
+}
+
+#if defined(CONFIG_DDB5477)
+
+#define DEFAULT_LCS1_BASE 0x19000000
+#define TESTVAL1 'K'
+#define TESTVAL2 'S'
+
+int board_ram_size;
+void ddb5477_runtime_detection(void)
+{
+ volatile char *test_offset;
+ char saved_test_byte;
+
+ /* Determine if this is a DDB5477 board, or a BSB-VR0300
+ base board. We can tell by checking for the location of
+ the NVRAM. It lives at the beginning of LCS1 on the DDB5477,
+ and the beginning of LCS1 on the BSB-VR0300 is flash memory.
+ The first 2K of the NVRAM are reserved, so don't we'll poke
+ around just after that.
+ */
+
+ /* We can only use the PCI bus to distinquish between
+ the Rockhopper and RockhopperII backplanes and this must
+ wait until ddb5477_board_init() in setup.c after the 5477
+ is initialized. So, until then handle
+ both Rockhopper and RockhopperII backplanes as Rockhopper 1
+ */
+
+ test_offset = (char *)KSEG1ADDR(DEFAULT_LCS1_BASE + 0x800);
+ saved_test_byte = *test_offset;
+
+ *test_offset = TESTVAL1;
+ if (*test_offset != TESTVAL1) {
+ /* We couldn't set our test value, so it must not be NVRAM,
+ so it's a BSB_VR0300 */
+ mips_machtype = MACH_NEC_ROCKHOPPER;
+ } else {
+ /* We may have gotten lucky, and the TESTVAL1 was already
+ stored at the test location, so we must check a second
+ test value */
+ *test_offset = TESTVAL2;
+ if (*test_offset != TESTVAL2) {
+ /* OK, we couldn't set this value either, so it must
+ definately be a BSB_VR0300 */
+ mips_machtype = MACH_NEC_ROCKHOPPER;
+ } else {
+ /* We could change the value twice, so it must be
+ NVRAM, so it's a DDB_VRC5477 */
+ mips_machtype = MACH_NEC_DDB5477;
+ }
+ }
+ /* Restore the original byte */
+ *test_offset = saved_test_byte;
+
+ /* before we know a better way, we will trust PMON for getting
+ * RAM size
+ */
+ board_ram_size = 1 << (36 - (ddb_in32(DDB_SDRAM0) & 0xf));
+
+ db_run(printk("DDB run-time detection : %s, %d MB RAM\n",
+ mips_machtype == MACH_NEC_DDB5477 ?
+ "DDB5477" : "Rockhopper",
+ board_ram_size >> 20));
+
+ /* we can't handle ram size > 128 MB */
+ db_assert(board_ram_size <= (128 << 20));
+}
+#endif
diff --git a/arch/mips/ddb5xxx/common/rtc_ds1386.c b/arch/mips/ddb5xxx/common/rtc_ds1386.c
new file mode 100644
index 00000000000..f5b11508ff2
--- /dev/null
+++ b/arch/mips/ddb5xxx/common/rtc_ds1386.c
@@ -0,0 +1,164 @@
+/*
+ * Copyright 2001 MontaVista Software Inc.
+ * Author: jsun@mvista.com or jsun@junsun.net
+ *
+ * arch/mips/ddb5xxx/common/rtc_ds1386.c
+ * low-level RTC hookups for s for Dallas 1396 chip.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+
+/*
+ * This file exports a function, rtc_ds1386_init(), which expects an
+ * uncached base address as the argument. It will set the two function
+ * pointers expected by the MIPS generic timer code.
+ */
+
+#include <linux/types.h>
+#include <linux/time.h>
+#include <linux/bcd.h>
+
+#include <asm/time.h>
+#include <asm/addrspace.h>
+
+#include <asm/mc146818rtc.h>
+#include <asm/debug.h>
+
+#define EPOCH 2000
+
+#define READ_RTC(x) *(volatile unsigned char*)(rtc_base+x)
+#define WRITE_RTC(x, y) *(volatile unsigned char*)(rtc_base+x) = y
+
+static unsigned long rtc_base;
+
+static unsigned long
+rtc_ds1386_get_time(void)
+{
+ u8 byte;
+ u8 temp;
+ unsigned int year, month, day, hour, minute, second;
+
+ /* let us freeze external registers */
+ byte = READ_RTC(0xB);
+ byte &= 0x3f;
+ WRITE_RTC(0xB, byte);
+
+ /* read time data */
+ year = BCD2BIN(READ_RTC(0xA)) + EPOCH;
+ month = BCD2BIN(READ_RTC(0x9) & 0x1f);
+ day = BCD2BIN(READ_RTC(0x8));
+ minute = BCD2BIN(READ_RTC(0x2));
+ second = BCD2BIN(READ_RTC(0x1));
+
+ /* hour is special - deal with it later */
+ temp = READ_RTC(0x4);
+
+ /* enable time transfer */
+ byte |= 0x80;
+ WRITE_RTC(0xB, byte);
+
+ /* calc hour */
+ if (temp & 0x40) {
+ /* 12 hour format */
+ hour = BCD2BIN(temp & 0x1f);
+ if (temp & 0x20) hour += 12; /* PM */
+ } else {
+ /* 24 hour format */
+ hour = BCD2BIN(temp & 0x3f);
+ }
+
+ return mktime(year, month, day, hour, minute, second);
+}
+
+static int
+rtc_ds1386_set_time(unsigned long t)
+{
+ struct rtc_time tm;
+ u8 byte;
+ u8 temp;
+ u8 year, month, day, hour, minute, second;
+
+ /* let us freeze external registers */
+ byte = READ_RTC(0xB);
+ byte &= 0x3f;
+ WRITE_RTC(0xB, byte);
+
+ /* convert */
+ to_tm(t, &tm);
+
+
+ /* check each field one by one */
+ year = BIN2BCD(tm.tm_year - EPOCH);
+ if (year != READ_RTC(0xA)) {
+ WRITE_RTC(0xA, year);
+ }
+
+ temp = READ_RTC(0x9);
+ month = BIN2BCD(tm.tm_mon+1); /* tm_mon starts from 0 to 11 */
+ if (month != (temp & 0x1f)) {
+ WRITE_RTC( 0x9,
+ (month & 0x1f) | (temp & ~0x1f) );
+ }
+
+ day = BIN2BCD(tm.tm_mday);
+ if (day != READ_RTC(0x8)) {
+ WRITE_RTC(0x8, day);
+ }
+
+ temp = READ_RTC(0x4);
+ if (temp & 0x40) {
+ /* 12 hour format */
+ hour = 0x40;
+ if (tm.tm_hour > 12) {
+ hour |= 0x20 | (BIN2BCD(hour-12) & 0x1f);
+ } else {
+ hour |= BIN2BCD(tm.tm_hour);
+ }
+ } else {
+ /* 24 hour format */
+ hour = BIN2BCD(tm.tm_hour) & 0x3f;
+ }
+ if (hour != temp) WRITE_RTC(0x4, hour);
+
+ minute = BIN2BCD(tm.tm_min);
+ if (minute != READ_RTC(0x2)) {
+ WRITE_RTC(0x2, minute);
+ }
+
+ second = BIN2BCD(tm.tm_sec);
+ if (second != READ_RTC(0x1)) {
+ WRITE_RTC(0x1, second);
+ }
+
+ return 0;
+}
+
+void
+rtc_ds1386_init(unsigned long base)
+{
+ unsigned char byte;
+
+ /* remember the base */
+ rtc_base = base;
+ db_assert((rtc_base & 0xe0000000) == KSEG1);
+
+ /* turn on RTC if it is not on */
+ byte = READ_RTC(0x9);
+ if (byte & 0x80) {
+ byte &= 0x7f;
+ WRITE_RTC(0x9, byte);
+ }
+
+ /* enable time transfer */
+ byte = READ_RTC(0xB);
+ byte |= 0x80;
+ WRITE_RTC(0xB, byte);
+
+ /* set the function pointers */
+ rtc_get_time = rtc_ds1386_get_time;
+ rtc_set_time = rtc_ds1386_set_time;
+}