diff options
| author | Ingo Molnar <mingo@elte.hu> | 2008-07-07 08:01:26 +0200 |
|---|---|---|
| committer | Ingo Molnar <mingo@elte.hu> | 2008-07-07 08:01:26 +0200 |
| commit | 032f82786f9be4635acaa5f77feca175a4ac5fe1 (patch) | |
| tree | 11ce43c1086d3dec43c92b0a2cc740240b338fb7 /arch/mips/kernel/cevt-txx9.c | |
| parent | 46ac22bab42cc868b9c1d0e915ddbc8e8065a44d (diff) | |
| parent | b7279469d66b55119784b8b9529c99c1955fe747 (diff) | |
Merge commit 'v2.6.26-rc9' into sched/devel
Diffstat (limited to 'arch/mips/kernel/cevt-txx9.c')
| -rw-r--r-- | arch/mips/kernel/cevt-txx9.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/mips/kernel/cevt-txx9.c b/arch/mips/kernel/cevt-txx9.c index 795cb8fb0d7..b5fc4eb412d 100644 --- a/arch/mips/kernel/cevt-txx9.c +++ b/arch/mips/kernel/cevt-txx9.c @@ -161,6 +161,9 @@ void __init txx9_tmr_init(unsigned long baseaddr) struct txx9_tmr_reg __iomem *tmrptr; tmrptr = ioremap(baseaddr, sizeof(struct txx9_tmr_reg)); + /* Start once to make CounterResetEnable effective */ + __raw_writel(TXx9_TMTCR_CRE | TXx9_TMTCR_TCE, &tmrptr->tcr); + /* Stop and reset the counter */ __raw_writel(TXx9_TMTCR_CRE, &tmrptr->tcr); __raw_writel(0, &tmrptr->tisr); __raw_writel(0xffffffff, &tmrptr->cpra); |